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94d0eaa419
Move mn88472 DVB-T/T2/C demod driver out of staging to media. v2: Fix build error reported by kbuild test robot: drivers/staging/media/mn88472/Makefile: No such file or directory Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
614 lines
14 KiB
C
614 lines
14 KiB
C
/*
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* Panasonic MN88472 DVB-T/T2/C demodulator driver
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*
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* Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "mn88472_priv.h"
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static int mn88472_get_tune_settings(struct dvb_frontend *fe,
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struct dvb_frontend_tune_settings *s)
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{
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s->min_delay_ms = 1000;
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return 0;
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}
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static int mn88472_read_status(struct dvb_frontend *fe, enum fe_status *status)
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{
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struct i2c_client *client = fe->demodulator_priv;
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struct mn88472_dev *dev = i2c_get_clientdata(client);
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret;
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unsigned int utmp;
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if (!dev->active) {
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ret = -EAGAIN;
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goto err;
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}
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switch (c->delivery_system) {
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case SYS_DVBT:
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ret = regmap_read(dev->regmap[0], 0x7f, &utmp);
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if (ret)
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goto err;
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if ((utmp & 0x0f) >= 0x09)
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*status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
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FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
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else
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*status = 0;
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break;
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case SYS_DVBT2:
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ret = regmap_read(dev->regmap[2], 0x92, &utmp);
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if (ret)
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goto err;
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if ((utmp & 0x0f) >= 0x0d)
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*status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
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FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
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else if ((utmp & 0x0f) >= 0x0a)
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*status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
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FE_HAS_VITERBI;
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else if ((utmp & 0x0f) >= 0x07)
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*status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
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else
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*status = 0;
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break;
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case SYS_DVBC_ANNEX_A:
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ret = regmap_read(dev->regmap[1], 0x84, &utmp);
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if (ret)
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goto err;
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if ((utmp & 0x0f) >= 0x08)
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*status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
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FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
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else
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*status = 0;
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break;
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default:
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ret = -EINVAL;
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goto err;
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}
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return 0;
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err:
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dev_dbg(&client->dev, "failed=%d\n", ret);
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return ret;
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}
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static int mn88472_set_frontend(struct dvb_frontend *fe)
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{
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struct i2c_client *client = fe->demodulator_priv;
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struct mn88472_dev *dev = i2c_get_clientdata(client);
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret, i;
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unsigned int utmp;
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u32 if_frequency;
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u8 buf[3], delivery_system_val, bandwidth_val, *bandwidth_vals_ptr;
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u8 reg_bank0_b4_val, reg_bank0_cd_val, reg_bank0_d4_val;
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u8 reg_bank0_d6_val;
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dev_dbg(&client->dev,
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"delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
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c->delivery_system, c->modulation, c->frequency,
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c->bandwidth_hz, c->symbol_rate, c->inversion, c->stream_id);
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if (!dev->active) {
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ret = -EAGAIN;
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goto err;
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}
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switch (c->delivery_system) {
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case SYS_DVBT:
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delivery_system_val = 0x02;
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reg_bank0_b4_val = 0x00;
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reg_bank0_cd_val = 0x1f;
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reg_bank0_d4_val = 0x0a;
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reg_bank0_d6_val = 0x48;
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break;
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case SYS_DVBT2:
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delivery_system_val = 0x03;
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reg_bank0_b4_val = 0xf6;
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reg_bank0_cd_val = 0x01;
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reg_bank0_d4_val = 0x09;
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reg_bank0_d6_val = 0x46;
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break;
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case SYS_DVBC_ANNEX_A:
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delivery_system_val = 0x04;
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reg_bank0_b4_val = 0x00;
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reg_bank0_cd_val = 0x17;
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reg_bank0_d4_val = 0x09;
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reg_bank0_d6_val = 0x48;
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break;
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default:
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ret = -EINVAL;
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goto err;
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}
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switch (c->delivery_system) {
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case SYS_DVBT:
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case SYS_DVBT2:
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switch (c->bandwidth_hz) {
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case 5000000:
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bandwidth_vals_ptr = "\xe5\x99\x9a\x1b\xa9\x1b\xa9";
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bandwidth_val = 0x03;
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break;
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case 6000000:
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bandwidth_vals_ptr = "\xbf\x55\x55\x15\x6b\x15\x6b";
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bandwidth_val = 0x02;
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break;
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case 7000000:
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bandwidth_vals_ptr = "\xa4\x00\x00\x0f\x2c\x0f\x2c";
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bandwidth_val = 0x01;
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break;
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case 8000000:
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bandwidth_vals_ptr = "\x8f\x80\x00\x08\xee\x08\xee";
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bandwidth_val = 0x00;
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break;
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default:
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ret = -EINVAL;
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goto err;
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}
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break;
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case SYS_DVBC_ANNEX_A:
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bandwidth_vals_ptr = NULL;
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bandwidth_val = 0x00;
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break;
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default:
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break;
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}
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/* Program tuner */
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if (fe->ops.tuner_ops.set_params) {
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ret = fe->ops.tuner_ops.set_params(fe);
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if (ret)
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goto err;
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}
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if (fe->ops.tuner_ops.get_if_frequency) {
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ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
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if (ret)
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goto err;
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dev_dbg(&client->dev, "get_if_frequency=%d\n", if_frequency);
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} else {
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ret = -EINVAL;
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goto err;
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}
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ret = regmap_write(dev->regmap[2], 0x00, 0x66);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[2], 0x01, 0x00);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[2], 0x02, 0x01);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[2], 0x04, bandwidth_val);
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if (ret)
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goto err;
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/* IF */
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utmp = DIV_ROUND_CLOSEST_ULL((u64)if_frequency * 0x1000000, dev->clk);
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buf[0] = (utmp >> 16) & 0xff;
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buf[1] = (utmp >> 8) & 0xff;
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buf[2] = (utmp >> 0) & 0xff;
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for (i = 0; i < 3; i++) {
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ret = regmap_write(dev->regmap[2], 0x10 + i, buf[i]);
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if (ret)
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goto err;
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}
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/* Bandwidth */
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if (bandwidth_vals_ptr) {
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for (i = 0; i < 7; i++) {
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ret = regmap_write(dev->regmap[2], 0x13 + i,
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bandwidth_vals_ptr[i]);
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if (ret)
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goto err;
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}
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}
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ret = regmap_write(dev->regmap[0], 0xb4, reg_bank0_b4_val);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[0], 0xcd, reg_bank0_cd_val);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[0], 0xd4, reg_bank0_d4_val);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[0], 0xd6, reg_bank0_d6_val);
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if (ret)
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goto err;
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switch (c->delivery_system) {
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case SYS_DVBT:
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ret = regmap_write(dev->regmap[0], 0x07, 0x26);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[0], 0x00, 0xba);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[0], 0x01, 0x13);
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if (ret)
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goto err;
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break;
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case SYS_DVBT2:
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ret = regmap_write(dev->regmap[2], 0x2b, 0x13);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[2], 0x4f, 0x05);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[1], 0xf6, 0x05);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[2], 0x32, c->stream_id);
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if (ret)
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goto err;
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break;
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case SYS_DVBC_ANNEX_A:
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break;
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default:
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break;
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}
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/* Reset FSM */
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ret = regmap_write(dev->regmap[2], 0xf8, 0x9f);
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if (ret)
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goto err;
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return 0;
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err:
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dev_dbg(&client->dev, "failed=%d\n", ret);
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return ret;
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}
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static int mn88472_init(struct dvb_frontend *fe)
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{
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struct i2c_client *client = fe->demodulator_priv;
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struct mn88472_dev *dev = i2c_get_clientdata(client);
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int ret, len, rem;
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unsigned int utmp;
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const struct firmware *firmware;
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const char *name = MN88472_FIRMWARE;
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dev_dbg(&client->dev, "\n");
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/* Power up */
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ret = regmap_write(dev->regmap[2], 0x05, 0x00);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[2], 0x0b, 0x00);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[2], 0x0c, 0x00);
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if (ret)
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goto err;
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/* Check if firmware is already running */
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ret = regmap_read(dev->regmap[0], 0xf5, &utmp);
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if (ret)
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goto err;
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if (!(utmp & 0x01))
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goto warm;
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ret = request_firmware(&firmware, name, &client->dev);
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if (ret) {
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dev_err(&client->dev, "firmware file '%s' not found\n", name);
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goto err;
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}
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dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
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ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
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if (ret)
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goto err_release_firmware;
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for (rem = firmware->size; rem > 0; rem -= (dev->i2c_write_max - 1)) {
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len = min(dev->i2c_write_max - 1, rem);
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ret = regmap_bulk_write(dev->regmap[0], 0xf6,
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&firmware->data[firmware->size - rem],
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len);
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if (ret) {
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dev_err(&client->dev, "firmware download failed %d\n",
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ret);
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goto err_release_firmware;
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}
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}
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/* Parity check of firmware */
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ret = regmap_read(dev->regmap[0], 0xf8, &utmp);
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if (ret)
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goto err_release_firmware;
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if (utmp & 0x10) {
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ret = -EINVAL;
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dev_err(&client->dev, "firmware did not run\n");
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goto err_release_firmware;
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}
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ret = regmap_write(dev->regmap[0], 0xf5, 0x00);
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if (ret)
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goto err_release_firmware;
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release_firmware(firmware);
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warm:
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/* TS config */
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switch (dev->ts_mode) {
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case SERIAL_TS_MODE:
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utmp = 0x1d;
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break;
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case PARALLEL_TS_MODE:
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utmp = 0x00;
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break;
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default:
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ret = -EINVAL;
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goto err;
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}
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ret = regmap_write(dev->regmap[2], 0x08, utmp);
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if (ret)
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goto err;
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switch (dev->ts_clk) {
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case VARIABLE_TS_CLOCK:
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utmp = 0xe3;
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break;
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case FIXED_TS_CLOCK:
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utmp = 0xe1;
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break;
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default:
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ret = -EINVAL;
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goto err;
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}
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ret = regmap_write(dev->regmap[0], 0xd9, utmp);
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if (ret)
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goto err;
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dev->active = true;
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return 0;
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err_release_firmware:
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release_firmware(firmware);
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err:
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dev_dbg(&client->dev, "failed=%d\n", ret);
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return ret;
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}
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static int mn88472_sleep(struct dvb_frontend *fe)
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{
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struct i2c_client *client = fe->demodulator_priv;
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struct mn88472_dev *dev = i2c_get_clientdata(client);
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int ret;
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dev_dbg(&client->dev, "\n");
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/* Power down */
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ret = regmap_write(dev->regmap[2], 0x0c, 0x30);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[2], 0x0b, 0x30);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
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if (ret)
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goto err;
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return 0;
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err:
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dev_dbg(&client->dev, "failed=%d\n", ret);
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return ret;
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}
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static struct dvb_frontend_ops mn88472_ops = {
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.delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A},
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.info = {
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.name = "Panasonic MN88472",
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.symbol_rate_min = 1000000,
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.symbol_rate_max = 7200000,
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.caps = FE_CAN_FEC_1_2 |
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FE_CAN_FEC_2_3 |
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FE_CAN_FEC_3_4 |
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FE_CAN_FEC_5_6 |
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FE_CAN_FEC_7_8 |
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FE_CAN_FEC_AUTO |
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FE_CAN_QPSK |
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FE_CAN_QAM_16 |
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FE_CAN_QAM_32 |
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FE_CAN_QAM_64 |
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FE_CAN_QAM_128 |
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FE_CAN_QAM_256 |
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FE_CAN_QAM_AUTO |
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FE_CAN_TRANSMISSION_MODE_AUTO |
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FE_CAN_GUARD_INTERVAL_AUTO |
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FE_CAN_HIERARCHY_AUTO |
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FE_CAN_MUTE_TS |
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FE_CAN_2G_MODULATION |
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FE_CAN_MULTISTREAM
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},
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.get_tune_settings = mn88472_get_tune_settings,
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.init = mn88472_init,
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.sleep = mn88472_sleep,
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.set_frontend = mn88472_set_frontend,
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.read_status = mn88472_read_status,
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};
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static struct dvb_frontend *mn88472_get_dvb_frontend(struct i2c_client *client)
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{
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struct mn88472_dev *dev = i2c_get_clientdata(client);
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dev_dbg(&client->dev, "\n");
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return &dev->fe;
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}
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static int mn88472_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct mn88472_config *pdata = client->dev.platform_data;
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struct mn88472_dev *dev;
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int ret;
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unsigned int utmp;
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static const struct regmap_config regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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};
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dev_dbg(&client->dev, "\n");
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dev = kzalloc(sizeof(*dev), GFP_KERNEL);
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if (!dev) {
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ret = -ENOMEM;
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goto err;
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}
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dev->i2c_write_max = pdata->i2c_wr_max ? pdata->i2c_wr_max : ~0;
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dev->clk = pdata->xtal;
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dev->ts_mode = pdata->ts_mode;
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dev->ts_clk = pdata->ts_clock;
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dev->client[0] = client;
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dev->regmap[0] = regmap_init_i2c(dev->client[0], ®map_config);
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if (IS_ERR(dev->regmap[0])) {
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ret = PTR_ERR(dev->regmap[0]);
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goto err_kfree;
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}
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|
/* Check demod answers with correct chip id */
|
|
ret = regmap_read(dev->regmap[0], 0xff, &utmp);
|
|
if (ret)
|
|
goto err_regmap_0_regmap_exit;
|
|
|
|
dev_dbg(&client->dev, "chip id=%02x\n", utmp);
|
|
|
|
if (utmp != 0x02) {
|
|
ret = -ENODEV;
|
|
goto err_regmap_0_regmap_exit;
|
|
}
|
|
|
|
/*
|
|
* Chip has three I2C addresses for different register banks. Used
|
|
* addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
|
|
* 0x1a and 0x1c, in order to get own I2C client for each register bank.
|
|
*
|
|
* Also, register bank 2 do not support sequential I/O. Only single
|
|
* register write or read is allowed to that bank.
|
|
*/
|
|
dev->client[1] = i2c_new_dummy(client->adapter, 0x1a);
|
|
if (!dev->client[1]) {
|
|
ret = -ENODEV;
|
|
dev_err(&client->dev, "I2C registration failed\n");
|
|
if (ret)
|
|
goto err_regmap_0_regmap_exit;
|
|
}
|
|
dev->regmap[1] = regmap_init_i2c(dev->client[1], ®map_config);
|
|
if (IS_ERR(dev->regmap[1])) {
|
|
ret = PTR_ERR(dev->regmap[1]);
|
|
goto err_client_1_i2c_unregister_device;
|
|
}
|
|
i2c_set_clientdata(dev->client[1], dev);
|
|
|
|
dev->client[2] = i2c_new_dummy(client->adapter, 0x1c);
|
|
if (!dev->client[2]) {
|
|
ret = -ENODEV;
|
|
dev_err(&client->dev, "2nd I2C registration failed\n");
|
|
if (ret)
|
|
goto err_regmap_1_regmap_exit;
|
|
}
|
|
dev->regmap[2] = regmap_init_i2c(dev->client[2], ®map_config);
|
|
if (IS_ERR(dev->regmap[2])) {
|
|
ret = PTR_ERR(dev->regmap[2]);
|
|
goto err_client_2_i2c_unregister_device;
|
|
}
|
|
i2c_set_clientdata(dev->client[2], dev);
|
|
|
|
/* Sleep because chip is active by default */
|
|
ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
|
|
if (ret)
|
|
goto err_regmap_2_regmap_exit;
|
|
|
|
/* Create dvb frontend */
|
|
memcpy(&dev->fe.ops, &mn88472_ops, sizeof(struct dvb_frontend_ops));
|
|
dev->fe.demodulator_priv = client;
|
|
*pdata->fe = &dev->fe;
|
|
i2c_set_clientdata(client, dev);
|
|
|
|
/* Setup callbacks */
|
|
pdata->get_dvb_frontend = mn88472_get_dvb_frontend;
|
|
|
|
dev_info(&client->dev, "Panasonic MN88472 successfully identified\n");
|
|
|
|
return 0;
|
|
err_regmap_2_regmap_exit:
|
|
regmap_exit(dev->regmap[2]);
|
|
err_client_2_i2c_unregister_device:
|
|
i2c_unregister_device(dev->client[2]);
|
|
err_regmap_1_regmap_exit:
|
|
regmap_exit(dev->regmap[1]);
|
|
err_client_1_i2c_unregister_device:
|
|
i2c_unregister_device(dev->client[1]);
|
|
err_regmap_0_regmap_exit:
|
|
regmap_exit(dev->regmap[0]);
|
|
err_kfree:
|
|
kfree(dev);
|
|
err:
|
|
dev_dbg(&client->dev, "failed=%d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
static int mn88472_remove(struct i2c_client *client)
|
|
{
|
|
struct mn88472_dev *dev = i2c_get_clientdata(client);
|
|
|
|
dev_dbg(&client->dev, "\n");
|
|
|
|
regmap_exit(dev->regmap[2]);
|
|
i2c_unregister_device(dev->client[2]);
|
|
|
|
regmap_exit(dev->regmap[1]);
|
|
i2c_unregister_device(dev->client[1]);
|
|
|
|
regmap_exit(dev->regmap[0]);
|
|
|
|
kfree(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id mn88472_id_table[] = {
|
|
{"mn88472", 0},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, mn88472_id_table);
|
|
|
|
static struct i2c_driver mn88472_driver = {
|
|
.driver = {
|
|
.name = "mn88472",
|
|
.suppress_bind_attrs = true,
|
|
},
|
|
.probe = mn88472_probe,
|
|
.remove = mn88472_remove,
|
|
.id_table = mn88472_id_table,
|
|
};
|
|
|
|
module_i2c_driver(mn88472_driver);
|
|
|
|
MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
|
|
MODULE_DESCRIPTION("Panasonic MN88472 DVB-T/T2/C demodulator driver");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_FIRMWARE(MN88472_FIRMWARE);
|