mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2025-01-08 23:04:35 +08:00
0ef6c9b8f7
The newer version 2 ColdFire CPU cores support a configurable cache arrangement. The cache memory can be used as all instruction cache, all data cache, or split in half for both instruction and data caching. Support this setup via a Kconfig time menu that allows a kernel builder to choose the arrangement they want to use. Signed-off-by: Greg Ungerer <gerg@uclinux.org> |
||
|---|---|---|
| .. | ||
| asm | ||