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e31cf2f4ca
Patch series "mm: consolidate definitions of page table accessors", v2. The low level page table accessors (pXY_index(), pXY_offset()) are duplicated across all architectures and sometimes more than once. For instance, we have 31 definition of pgd_offset() for 25 supported architectures. Most of these definitions are actually identical and typically it boils down to, e.g. static inline unsigned long pmd_index(unsigned long address) { return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); } static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) { return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); } These definitions can be shared among 90% of the arches provided XYZ_SHIFT, PTRS_PER_XYZ and xyz_page_vaddr() are defined. For architectures that really need a custom version there is always possibility to override the generic version with the usual ifdefs magic. These patches introduce include/linux/pgtable.h that replaces include/asm-generic/pgtable.h and add the definitions of the page table accessors to the new header. This patch (of 12): The linux/mm.h header includes <asm/pgtable.h> to allow inlining of the functions involving page table manipulations, e.g. pte_alloc() and pmd_alloc(). So, there is no point to explicitly include <asm/pgtable.h> in the files that include <linux/mm.h>. The include statements in such cases are remove with a simple loop: for f in $(git grep -l "include <linux/mm.h>") ; do sed -i -e '/include <asm\/pgtable.h>/ d' $f done Signed-off-by: Mike Rapoport <rppt@linux.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Cain <bcain@codeaurora.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Chris Zankel <chris@zankel.net> Cc: "David S. Miller" <davem@davemloft.net> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Greentime Hu <green.hu@gmail.com> Cc: Greg Ungerer <gerg@linux-m68k.org> Cc: Guan Xuetao <gxt@pku.edu.cn> Cc: Guo Ren <guoren@kernel.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Helge Deller <deller@gmx.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Mark Salter <msalter@redhat.com> Cc: Matthew Wilcox <willy@infradead.org> Cc: Matt Turner <mattst88@gmail.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Michal Simek <monstr@monstr.eu> Cc: Mike Rapoport <rppt@kernel.org> Cc: Nick Hu <nickhu@andestech.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Richard Weinberger <richard@nod.at> Cc: Rich Felker <dalias@libc.org> Cc: Russell King <linux@armlinux.org.uk> Cc: Stafford Horne <shorne@gmail.com> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Cc: Vincent Chen <deanbo422@gmail.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Will Deacon <will@kernel.org> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Link: http://lkml.kernel.org/r/20200514170327.31389-1-rppt@kernel.org Link: http://lkml.kernel.org/r/20200514170327.31389-2-rppt@kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
289 lines
7.9 KiB
C
289 lines
7.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* linux/arch/alpha/kernel/sys_takara.c
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*
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* Copyright (C) 1995 David A Rusling
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* Copyright (C) 1996 Jay A Estabrook
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* Copyright (C) 1998, 1999 Richard Henderson
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*
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* Code supporting the TAKARA.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <asm/ptrace.h>
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#include <asm/dma.h>
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#include <asm/irq.h>
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#include <asm/mmu_context.h>
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#include <asm/io.h>
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#include <asm/core_cia.h>
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#include <asm/tlbflush.h>
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#include "proto.h"
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#include "irq_impl.h"
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#include "pci_impl.h"
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#include "machvec_impl.h"
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#include "pc873xx.h"
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/* Note mask bit is true for DISABLED irqs. */
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static unsigned long cached_irq_mask[2] = { -1, -1 };
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static inline void
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takara_update_irq_hw(unsigned long irq, unsigned long mask)
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{
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int regaddr;
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mask = (irq >= 64 ? mask << 16 : mask >> ((irq - 16) & 0x30));
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regaddr = 0x510 + (((irq - 16) >> 2) & 0x0c);
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outl(mask & 0xffff0000UL, regaddr);
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}
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static inline void
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takara_enable_irq(struct irq_data *d)
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{
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unsigned int irq = d->irq;
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unsigned long mask;
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mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63)));
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takara_update_irq_hw(irq, mask);
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}
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static void
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takara_disable_irq(struct irq_data *d)
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{
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unsigned int irq = d->irq;
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unsigned long mask;
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mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63));
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takara_update_irq_hw(irq, mask);
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}
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static struct irq_chip takara_irq_type = {
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.name = "TAKARA",
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.irq_unmask = takara_enable_irq,
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.irq_mask = takara_disable_irq,
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.irq_mask_ack = takara_disable_irq,
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};
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static void
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takara_device_interrupt(unsigned long vector)
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{
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unsigned intstatus;
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/*
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* The PALcode will have passed us vectors 0x800 or 0x810,
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* which are fairly arbitrary values and serve only to tell
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* us whether an interrupt has come in on IRQ0 or IRQ1. If
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* it's IRQ1 it's a PCI interrupt; if it's IRQ0, it's
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* probably ISA, but PCI interrupts can come through IRQ0
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* as well if the interrupt controller isn't in accelerated
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* mode.
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*
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* OTOH, the accelerator thing doesn't seem to be working
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* overly well, so what we'll do instead is try directly
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* examining the Master Interrupt Register to see if it's a
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* PCI interrupt, and if _not_ then we'll pass it on to the
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* ISA handler.
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*/
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intstatus = inw(0x500) & 15;
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if (intstatus) {
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/*
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* This is a PCI interrupt. Check each bit and
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* despatch an interrupt if it's set.
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*/
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if (intstatus & 8) handle_irq(16+3);
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if (intstatus & 4) handle_irq(16+2);
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if (intstatus & 2) handle_irq(16+1);
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if (intstatus & 1) handle_irq(16+0);
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} else {
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isa_device_interrupt (vector);
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}
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}
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static void
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takara_srm_device_interrupt(unsigned long vector)
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{
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int irq = (vector - 0x800) >> 4;
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handle_irq(irq);
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}
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static void __init
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takara_init_irq(void)
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{
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long i;
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init_i8259a_irqs();
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if (alpha_using_srm) {
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alpha_mv.device_interrupt = takara_srm_device_interrupt;
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} else {
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unsigned int ctlreg = inl(0x500);
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/* Return to non-accelerated mode. */
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ctlreg &= ~0x8000;
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outl(ctlreg, 0x500);
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/* Enable the PCI interrupt register. */
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ctlreg = 0x05107c00;
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outl(ctlreg, 0x500);
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}
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for (i = 16; i < 128; i += 16)
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takara_update_irq_hw(i, -1);
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for (i = 16; i < 128; ++i) {
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irq_set_chip_and_handler(i, &takara_irq_type,
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handle_level_irq);
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irq_set_status_flags(i, IRQ_LEVEL);
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}
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common_init_isa_dma();
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}
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/*
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* The Takara has PCI devices 1, 2, and 3 configured to slots 20,
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* 19, and 18 respectively, in the default configuration. They can
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* also be jumpered to slots 8, 7, and 6 respectively, which is fun
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* because the SIO ISA bridge can also be slot 7. However, the SIO
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* doesn't explicitly generate PCI-type interrupts, so we can
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* assign it whatever the hell IRQ we like and it doesn't matter.
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*/
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static int
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takara_map_irq_srm(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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static char irq_tab[15][5] = {
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{ 16+3, 16+3, 16+3, 16+3, 16+3}, /* slot 6 == device 3 */
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{ 16+2, 16+2, 16+2, 16+2, 16+2}, /* slot 7 == device 2 */
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{ 16+1, 16+1, 16+1, 16+1, 16+1}, /* slot 8 == device 1 */
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{ -1, -1, -1, -1, -1}, /* slot 9 == nothing */
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{ -1, -1, -1, -1, -1}, /* slot 10 == nothing */
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{ -1, -1, -1, -1, -1}, /* slot 11 == nothing */
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/* These are behind the bridges. */
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{ 12, 12, 13, 14, 15}, /* slot 12 == nothing */
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{ 8, 8, 9, 19, 11}, /* slot 13 == nothing */
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{ 4, 4, 5, 6, 7}, /* slot 14 == nothing */
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{ 0, 0, 1, 2, 3}, /* slot 15 == nothing */
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{ -1, -1, -1, -1, -1}, /* slot 16 == nothing */
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{64+ 0, 64+0, 64+1, 64+2, 64+3}, /* slot 17= device 4 */
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{48+ 0, 48+0, 48+1, 48+2, 48+3}, /* slot 18= device 3 */
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{32+ 0, 32+0, 32+1, 32+2, 32+3}, /* slot 19= device 2 */
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{16+ 0, 16+0, 16+1, 16+2, 16+3}, /* slot 20= device 1 */
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};
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const long min_idsel = 6, max_idsel = 20, irqs_per_slot = 5;
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int irq = COMMON_TABLE_LOOKUP;
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if (irq >= 0 && irq < 16) {
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/* Guess that we are behind a bridge. */
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unsigned int busslot = PCI_SLOT(dev->bus->self->devfn);
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irq += irq_tab[busslot-min_idsel][0];
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}
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return irq;
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}
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static int __init
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takara_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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static char irq_tab[15][5] __initdata = {
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{ 16+3, 16+3, 16+3, 16+3, 16+3}, /* slot 6 == device 3 */
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{ 16+2, 16+2, 16+2, 16+2, 16+2}, /* slot 7 == device 2 */
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{ 16+1, 16+1, 16+1, 16+1, 16+1}, /* slot 8 == device 1 */
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{ -1, -1, -1, -1, -1}, /* slot 9 == nothing */
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{ -1, -1, -1, -1, -1}, /* slot 10 == nothing */
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{ -1, -1, -1, -1, -1}, /* slot 11 == nothing */
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{ -1, -1, -1, -1, -1}, /* slot 12 == nothing */
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{ -1, -1, -1, -1, -1}, /* slot 13 == nothing */
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{ -1, -1, -1, -1, -1}, /* slot 14 == nothing */
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{ -1, -1, -1, -1, -1}, /* slot 15 == nothing */
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{ -1, -1, -1, -1, -1}, /* slot 16 == nothing */
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{ -1, -1, -1, -1, -1}, /* slot 17 == nothing */
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{ 16+3, 16+3, 16+3, 16+3, 16+3}, /* slot 18 == device 3 */
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{ 16+2, 16+2, 16+2, 16+2, 16+2}, /* slot 19 == device 2 */
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{ 16+1, 16+1, 16+1, 16+1, 16+1}, /* slot 20 == device 1 */
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};
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const long min_idsel = 6, max_idsel = 20, irqs_per_slot = 5;
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return COMMON_TABLE_LOOKUP;
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}
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static u8
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takara_swizzle(struct pci_dev *dev, u8 *pinp)
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{
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int slot = PCI_SLOT(dev->devfn);
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int pin = *pinp;
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unsigned int ctlreg = inl(0x500);
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unsigned int busslot;
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if (!dev->bus->self)
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return slot;
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busslot = PCI_SLOT(dev->bus->self->devfn);
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/* Check for built-in bridges. */
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if (dev->bus->number != 0
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&& busslot > 16
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&& ((1<<(36-busslot)) & ctlreg)) {
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if (pin == 1)
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pin += (20 - busslot);
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else {
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printk(KERN_WARNING "takara_swizzle: can only "
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"handle cards with INTA IRQ pin.\n");
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}
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} else {
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/* Must be a card-based bridge. */
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printk(KERN_WARNING "takara_swizzle: cannot handle "
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"card-bridge behind builtin bridge yet.\n");
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}
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*pinp = pin;
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return slot;
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}
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static void __init
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takara_init_pci(void)
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{
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if (alpha_using_srm)
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alpha_mv.pci_map_irq = takara_map_irq_srm;
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cia_init_pci();
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if (pc873xx_probe() == -1) {
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printk(KERN_ERR "Probing for PC873xx Super IO chip failed.\n");
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} else {
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printk(KERN_INFO "Found %s Super IO chip at 0x%x\n",
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pc873xx_get_model(), pc873xx_get_base());
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pc873xx_enable_ide();
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}
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}
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/*
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* The System Vector
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*/
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struct alpha_machine_vector takara_mv __initmv = {
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.vector_name = "Takara",
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DO_EV5_MMU,
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DO_DEFAULT_RTC,
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DO_CIA_IO,
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.machine_check = cia_machine_check,
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.max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
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.min_io_address = DEFAULT_IO_BASE,
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.min_mem_address = CIA_DEFAULT_MEM_BASE,
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.nr_irqs = 128,
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.device_interrupt = takara_device_interrupt,
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.init_arch = cia_init_arch,
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.init_irq = takara_init_irq,
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.init_rtc = common_init_rtc,
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.init_pci = takara_init_pci,
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.kill_arch = cia_kill_arch,
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.pci_map_irq = takara_map_irq,
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.pci_swizzle = takara_swizzle,
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};
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ALIAS_MV(takara)
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