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5dca80f63e
Because suspending to RAM may lose the register values, they are restored on resume. This is currently done unconditionally because there is currently no way to know (from the driver) whether they have really been lost or are still valid. Writing MR also pings the watchdog and this may not be what is expected so add a comment explaining why it happens. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
331 lines
7.8 KiB
C
331 lines
7.8 KiB
C
/*
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* Driver for Atmel SAMA5D4 Watchdog Timer
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*
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* Copyright (C) 2015 Atmel Corporation
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*
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* Licensed under GPLv2.
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*/
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/reboot.h>
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#include <linux/watchdog.h>
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#include "at91sam9_wdt.h"
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/* minimum and maximum watchdog timeout, in seconds */
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#define MIN_WDT_TIMEOUT 1
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#define MAX_WDT_TIMEOUT 16
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#define WDT_DEFAULT_TIMEOUT MAX_WDT_TIMEOUT
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#define WDT_SEC2TICKS(s) ((s) ? (((s) << 8) - 1) : 0)
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struct sama5d4_wdt {
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struct watchdog_device wdd;
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void __iomem *reg_base;
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u32 mr;
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unsigned long last_ping;
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};
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static int wdt_timeout = WDT_DEFAULT_TIMEOUT;
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(wdt_timeout, int, 0);
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MODULE_PARM_DESC(wdt_timeout,
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"Watchdog timeout in seconds. (default = "
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__MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout,
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"Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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#define wdt_enabled (!(wdt->mr & AT91_WDT_WDDIS))
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#define wdt_read(wdt, field) \
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readl_relaxed((wdt)->reg_base + (field))
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/* 4 slow clock periods is 4/32768 = 122.07µs*/
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#define WDT_DELAY usecs_to_jiffies(123)
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static void wdt_write(struct sama5d4_wdt *wdt, u32 field, u32 val)
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{
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/*
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* WDT_CR and WDT_MR must not be modified within three slow clock
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* periods following a restart of the watchdog performed by a write
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* access in WDT_CR.
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*/
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while (time_before(jiffies, wdt->last_ping + WDT_DELAY))
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usleep_range(30, 125);
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writel_relaxed(val, wdt->reg_base + field);
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wdt->last_ping = jiffies;
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}
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static void wdt_write_nosleep(struct sama5d4_wdt *wdt, u32 field, u32 val)
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{
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if (time_before(jiffies, wdt->last_ping + WDT_DELAY))
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udelay(123);
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writel_relaxed(val, wdt->reg_base + field);
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wdt->last_ping = jiffies;
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}
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static int sama5d4_wdt_start(struct watchdog_device *wdd)
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{
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struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
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wdt->mr &= ~AT91_WDT_WDDIS;
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wdt_write(wdt, AT91_WDT_MR, wdt->mr);
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return 0;
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}
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static int sama5d4_wdt_stop(struct watchdog_device *wdd)
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{
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struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
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wdt->mr |= AT91_WDT_WDDIS;
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wdt_write(wdt, AT91_WDT_MR, wdt->mr);
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return 0;
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}
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static int sama5d4_wdt_ping(struct watchdog_device *wdd)
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{
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struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
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wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
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return 0;
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}
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static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd,
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unsigned int timeout)
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{
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struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
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u32 value = WDT_SEC2TICKS(timeout);
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wdt->mr &= ~AT91_WDT_WDV;
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wdt->mr &= ~AT91_WDT_WDD;
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wdt->mr |= AT91_WDT_SET_WDV(value);
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wdt->mr |= AT91_WDT_SET_WDD(value);
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/*
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* WDDIS has to be 0 when updating WDD/WDV. The datasheet states: When
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* setting the WDDIS bit, and while it is set, the fields WDV and WDD
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* must not be modified.
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* If the watchdog is enabled, then the timeout can be updated. Else,
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* wait that the user enables it.
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*/
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if (wdt_enabled)
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wdt_write(wdt, AT91_WDT_MR, wdt->mr & ~AT91_WDT_WDDIS);
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wdd->timeout = timeout;
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return 0;
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}
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static const struct watchdog_info sama5d4_wdt_info = {
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.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
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.identity = "Atmel SAMA5D4 Watchdog",
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};
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static const struct watchdog_ops sama5d4_wdt_ops = {
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.owner = THIS_MODULE,
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.start = sama5d4_wdt_start,
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.stop = sama5d4_wdt_stop,
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.ping = sama5d4_wdt_ping,
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.set_timeout = sama5d4_wdt_set_timeout,
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};
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static irqreturn_t sama5d4_wdt_irq_handler(int irq, void *dev_id)
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{
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struct sama5d4_wdt *wdt = platform_get_drvdata(dev_id);
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if (wdt_read(wdt, AT91_WDT_SR)) {
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pr_crit("Atmel Watchdog Software Reset\n");
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emergency_restart();
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pr_crit("Reboot didn't succeed\n");
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}
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return IRQ_HANDLED;
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}
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static int of_sama5d4_wdt_init(struct device_node *np, struct sama5d4_wdt *wdt)
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{
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const char *tmp;
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wdt->mr = AT91_WDT_WDDIS;
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if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
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!strcmp(tmp, "software"))
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wdt->mr |= AT91_WDT_WDFIEN;
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else
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wdt->mr |= AT91_WDT_WDRSTEN;
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if (of_property_read_bool(np, "atmel,idle-halt"))
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wdt->mr |= AT91_WDT_WDIDLEHLT;
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if (of_property_read_bool(np, "atmel,dbg-halt"))
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wdt->mr |= AT91_WDT_WDDBGHLT;
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return 0;
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}
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static int sama5d4_wdt_init(struct sama5d4_wdt *wdt)
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{
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u32 reg;
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/*
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* When booting and resuming, the bootloader may have changed the
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* watchdog configuration.
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* If the watchdog is already running, we can safely update it.
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* Else, we have to disable it properly.
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*/
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if (wdt_enabled) {
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wdt_write_nosleep(wdt, AT91_WDT_MR, wdt->mr);
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} else {
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reg = wdt_read(wdt, AT91_WDT_MR);
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if (!(reg & AT91_WDT_WDDIS))
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wdt_write_nosleep(wdt, AT91_WDT_MR,
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reg | AT91_WDT_WDDIS);
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}
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return 0;
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}
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static int sama5d4_wdt_probe(struct platform_device *pdev)
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{
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struct watchdog_device *wdd;
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struct sama5d4_wdt *wdt;
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struct resource *res;
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void __iomem *regs;
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u32 irq = 0;
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u32 timeout;
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int ret;
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wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
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if (!wdt)
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return -ENOMEM;
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wdd = &wdt->wdd;
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wdd->timeout = wdt_timeout;
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wdd->info = &sama5d4_wdt_info;
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wdd->ops = &sama5d4_wdt_ops;
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wdd->min_timeout = MIN_WDT_TIMEOUT;
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wdd->max_timeout = MAX_WDT_TIMEOUT;
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wdt->last_ping = jiffies;
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watchdog_set_drvdata(wdd, wdt);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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regs = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(regs))
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return PTR_ERR(regs);
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wdt->reg_base = regs;
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irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
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if (!irq)
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dev_warn(&pdev->dev, "failed to get IRQ from DT\n");
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ret = of_sama5d4_wdt_init(pdev->dev.of_node, wdt);
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if (ret)
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return ret;
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if ((wdt->mr & AT91_WDT_WDFIEN) && irq) {
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ret = devm_request_irq(&pdev->dev, irq, sama5d4_wdt_irq_handler,
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IRQF_SHARED | IRQF_IRQPOLL |
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IRQF_NO_SUSPEND, pdev->name, pdev);
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if (ret) {
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dev_err(&pdev->dev,
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"cannot register interrupt handler\n");
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return ret;
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}
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}
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ret = watchdog_init_timeout(wdd, wdt_timeout, &pdev->dev);
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if (ret) {
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dev_err(&pdev->dev, "unable to set timeout value\n");
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return ret;
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}
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timeout = WDT_SEC2TICKS(wdd->timeout);
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wdt->mr |= AT91_WDT_SET_WDD(timeout);
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wdt->mr |= AT91_WDT_SET_WDV(timeout);
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ret = sama5d4_wdt_init(wdt);
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if (ret)
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return ret;
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watchdog_set_nowayout(wdd, nowayout);
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ret = watchdog_register_device(wdd);
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if (ret) {
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dev_err(&pdev->dev, "failed to register watchdog device\n");
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return ret;
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}
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platform_set_drvdata(pdev, wdt);
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dev_info(&pdev->dev, "initialized (timeout = %d sec, nowayout = %d)\n",
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wdt_timeout, nowayout);
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return 0;
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}
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static int sama5d4_wdt_remove(struct platform_device *pdev)
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{
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struct sama5d4_wdt *wdt = platform_get_drvdata(pdev);
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sama5d4_wdt_stop(&wdt->wdd);
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watchdog_unregister_device(&wdt->wdd);
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return 0;
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}
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static const struct of_device_id sama5d4_wdt_of_match[] = {
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{ .compatible = "atmel,sama5d4-wdt", },
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{ }
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};
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MODULE_DEVICE_TABLE(of, sama5d4_wdt_of_match);
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#ifdef CONFIG_PM_SLEEP
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static int sama5d4_wdt_resume(struct device *dev)
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{
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struct sama5d4_wdt *wdt = dev_get_drvdata(dev);
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/*
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* FIXME: writing MR also pings the watchdog which may not be desired.
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* This should only be done when the registers are lost on suspend but
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* there is no way to get this information right now.
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*/
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sama5d4_wdt_init(wdt);
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return 0;
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}
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#endif
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static SIMPLE_DEV_PM_OPS(sama5d4_wdt_pm_ops, NULL,
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sama5d4_wdt_resume);
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static struct platform_driver sama5d4_wdt_driver = {
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.probe = sama5d4_wdt_probe,
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.remove = sama5d4_wdt_remove,
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.driver = {
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.name = "sama5d4_wdt",
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.pm = &sama5d4_wdt_pm_ops,
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.of_match_table = sama5d4_wdt_of_match,
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}
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};
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module_platform_driver(sama5d4_wdt_driver);
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MODULE_AUTHOR("Atmel Corporation");
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MODULE_DESCRIPTION("Atmel SAMA5D4 Watchdog Timer driver");
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MODULE_LICENSE("GPL v2");
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