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With the early_enable module parameter the watchdog can be started during driver probe time. If this is requested the bets are good that the timer is already running, so to narrow the gap where the timer is disabled only call the disable function when the timer shouldn't be started. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
382 lines
9.6 KiB
C
382 lines
9.6 KiB
C
/*
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* omap_wdt.c
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*
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* Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
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*
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* Author: MontaVista Software, Inc.
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* <gdavis@mvista.com> or <source@mvista.com>
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*
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* 2003 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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* History:
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*
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* 20030527: George G. Davis <gdavis@mvista.com>
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* Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
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* (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
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* Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
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*
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* Copyright (c) 2004 Texas Instruments.
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* 1. Modified to support OMAP1610 32-KHz watchdog timer
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* 2. Ported to 2.6 kernel
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*
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* Copyright (c) 2005 David Brownell
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* Use the driver model and standard identifiers; handle bigger timeouts.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/watchdog.h>
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#include <linux/reboot.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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#include <linux/moduleparam.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/pm_runtime.h>
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#include <linux/platform_data/omap-wd-timer.h>
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#include "omap_wdt.h"
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
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"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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static unsigned timer_margin;
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module_param(timer_margin, uint, 0);
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MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
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#define to_omap_wdt_dev(_wdog) container_of(_wdog, struct omap_wdt_dev, wdog)
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static bool early_enable;
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module_param(early_enable, bool, 0);
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MODULE_PARM_DESC(early_enable,
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"Watchdog is started on module insertion (default=0)");
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struct omap_wdt_dev {
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struct watchdog_device wdog;
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void __iomem *base; /* physical */
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struct device *dev;
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bool omap_wdt_users;
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int wdt_trgr_pattern;
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struct mutex lock; /* to avoid races with PM */
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};
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static void omap_wdt_reload(struct omap_wdt_dev *wdev)
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{
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void __iomem *base = wdev->base;
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/* wait for posted write to complete */
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while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
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cpu_relax();
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wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern;
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writel_relaxed(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
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/* wait for posted write to complete */
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while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08)
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cpu_relax();
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/* reloaded WCRR from WLDR */
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}
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static void omap_wdt_enable(struct omap_wdt_dev *wdev)
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{
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void __iomem *base = wdev->base;
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/* Sequence to enable the watchdog */
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writel_relaxed(0xBBBB, base + OMAP_WATCHDOG_SPR);
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while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
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cpu_relax();
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writel_relaxed(0x4444, base + OMAP_WATCHDOG_SPR);
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while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10)
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cpu_relax();
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}
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static void omap_wdt_disable(struct omap_wdt_dev *wdev)
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{
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void __iomem *base = wdev->base;
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/* sequence required to disable watchdog */
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writel_relaxed(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
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while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
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cpu_relax();
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writel_relaxed(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
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while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10)
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cpu_relax();
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}
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static void omap_wdt_set_timer(struct omap_wdt_dev *wdev,
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unsigned int timeout)
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{
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u32 pre_margin = GET_WLDR_VAL(timeout);
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void __iomem *base = wdev->base;
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/* just count up at 32 KHz */
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while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
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cpu_relax();
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writel_relaxed(pre_margin, base + OMAP_WATCHDOG_LDR);
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while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04)
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cpu_relax();
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}
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static int omap_wdt_start(struct watchdog_device *wdog)
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{
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struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
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void __iomem *base = wdev->base;
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mutex_lock(&wdev->lock);
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wdev->omap_wdt_users = true;
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pm_runtime_get_sync(wdev->dev);
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/*
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* Make sure the watchdog is disabled. This is unfortunately required
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* because writing to various registers with the watchdog running has no
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* effect.
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*/
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omap_wdt_disable(wdev);
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/* initialize prescaler */
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while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
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cpu_relax();
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writel_relaxed((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
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while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01)
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cpu_relax();
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omap_wdt_set_timer(wdev, wdog->timeout);
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omap_wdt_reload(wdev); /* trigger loading of new timeout value */
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omap_wdt_enable(wdev);
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mutex_unlock(&wdev->lock);
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return 0;
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}
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static int omap_wdt_stop(struct watchdog_device *wdog)
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{
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struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
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mutex_lock(&wdev->lock);
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omap_wdt_disable(wdev);
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pm_runtime_put_sync(wdev->dev);
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wdev->omap_wdt_users = false;
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mutex_unlock(&wdev->lock);
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return 0;
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}
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static int omap_wdt_ping(struct watchdog_device *wdog)
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{
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struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
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mutex_lock(&wdev->lock);
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omap_wdt_reload(wdev);
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mutex_unlock(&wdev->lock);
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return 0;
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}
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static int omap_wdt_set_timeout(struct watchdog_device *wdog,
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unsigned int timeout)
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{
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struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
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mutex_lock(&wdev->lock);
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omap_wdt_disable(wdev);
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omap_wdt_set_timer(wdev, timeout);
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omap_wdt_enable(wdev);
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omap_wdt_reload(wdev);
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wdog->timeout = timeout;
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mutex_unlock(&wdev->lock);
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return 0;
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}
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static unsigned int omap_wdt_get_timeleft(struct watchdog_device *wdog)
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{
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struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog);
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void __iomem *base = wdev->base;
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u32 value;
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value = readl_relaxed(base + OMAP_WATCHDOG_CRR);
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return GET_WCCR_SECS(value);
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}
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static const struct watchdog_info omap_wdt_info = {
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.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
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.identity = "OMAP Watchdog",
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};
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static const struct watchdog_ops omap_wdt_ops = {
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.owner = THIS_MODULE,
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.start = omap_wdt_start,
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.stop = omap_wdt_stop,
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.ping = omap_wdt_ping,
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.set_timeout = omap_wdt_set_timeout,
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.get_timeleft = omap_wdt_get_timeleft,
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};
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static int omap_wdt_probe(struct platform_device *pdev)
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{
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struct omap_wd_timer_platform_data *pdata = dev_get_platdata(&pdev->dev);
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struct resource *res;
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struct omap_wdt_dev *wdev;
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int ret;
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wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
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if (!wdev)
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return -ENOMEM;
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wdev->omap_wdt_users = false;
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wdev->dev = &pdev->dev;
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wdev->wdt_trgr_pattern = 0x1234;
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mutex_init(&wdev->lock);
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/* reserve static register mappings */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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wdev->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(wdev->base))
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return PTR_ERR(wdev->base);
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wdev->wdog.info = &omap_wdt_info;
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wdev->wdog.ops = &omap_wdt_ops;
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wdev->wdog.min_timeout = TIMER_MARGIN_MIN;
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wdev->wdog.max_timeout = TIMER_MARGIN_MAX;
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wdev->wdog.parent = &pdev->dev;
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if (watchdog_init_timeout(&wdev->wdog, timer_margin, &pdev->dev) < 0)
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wdev->wdog.timeout = TIMER_MARGIN_DEFAULT;
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watchdog_set_nowayout(&wdev->wdog, nowayout);
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platform_set_drvdata(pdev, wdev);
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pm_runtime_enable(wdev->dev);
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pm_runtime_get_sync(wdev->dev);
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if (pdata && pdata->read_reset_sources) {
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u32 rs = pdata->read_reset_sources();
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if (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT))
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wdev->wdog.bootstatus = WDIOF_CARDRESET;
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}
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if (!early_enable)
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omap_wdt_disable(wdev);
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ret = watchdog_register_device(&wdev->wdog);
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if (ret) {
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pm_runtime_disable(wdev->dev);
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return ret;
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}
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pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
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readl_relaxed(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
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wdev->wdog.timeout);
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if (early_enable)
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omap_wdt_start(&wdev->wdog);
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pm_runtime_put(wdev->dev);
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return 0;
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}
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static void omap_wdt_shutdown(struct platform_device *pdev)
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{
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struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
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mutex_lock(&wdev->lock);
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if (wdev->omap_wdt_users) {
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omap_wdt_disable(wdev);
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pm_runtime_put_sync(wdev->dev);
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}
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mutex_unlock(&wdev->lock);
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}
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static int omap_wdt_remove(struct platform_device *pdev)
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{
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struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
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pm_runtime_disable(wdev->dev);
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watchdog_unregister_device(&wdev->wdog);
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return 0;
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}
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#ifdef CONFIG_PM
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/* REVISIT ... not clear this is the best way to handle system suspend; and
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* it's very inappropriate for selective device suspend (e.g. suspending this
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* through sysfs rather than by stopping the watchdog daemon). Also, this
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* may not play well enough with NOWAYOUT...
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*/
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static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
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{
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struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
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mutex_lock(&wdev->lock);
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if (wdev->omap_wdt_users) {
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omap_wdt_disable(wdev);
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pm_runtime_put_sync(wdev->dev);
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}
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mutex_unlock(&wdev->lock);
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return 0;
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}
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static int omap_wdt_resume(struct platform_device *pdev)
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{
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struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
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mutex_lock(&wdev->lock);
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if (wdev->omap_wdt_users) {
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pm_runtime_get_sync(wdev->dev);
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omap_wdt_enable(wdev);
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omap_wdt_reload(wdev);
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}
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mutex_unlock(&wdev->lock);
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return 0;
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}
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#else
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#define omap_wdt_suspend NULL
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#define omap_wdt_resume NULL
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#endif
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static const struct of_device_id omap_wdt_of_match[] = {
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{ .compatible = "ti,omap3-wdt", },
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{},
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};
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MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
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static struct platform_driver omap_wdt_driver = {
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.probe = omap_wdt_probe,
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.remove = omap_wdt_remove,
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.shutdown = omap_wdt_shutdown,
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.suspend = omap_wdt_suspend,
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.resume = omap_wdt_resume,
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.driver = {
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.name = "omap_wdt",
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.of_match_table = omap_wdt_of_match,
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},
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};
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module_platform_driver(omap_wdt_driver);
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MODULE_AUTHOR("George G. Davis");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:omap_wdt");
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