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The initial info message (early in the esb_probe() function) is not very useful and we already have a message on successful probe, which includes device identification. If the probe fails (e.g. PCI related errors), additional messages are printed anyway. The version number was only used in the initial info message. Other than that, it serves no useful purpose and it ran out of favor upstream anyway. Signed-off-by: Radu Rendec <rrendec@arista.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
364 lines
10 KiB
C
364 lines
10 KiB
C
/*
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* i6300esb: Watchdog timer driver for Intel 6300ESB chipset
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*
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* (c) Copyright 2004 Google Inc.
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* (c) Copyright 2005 David Härdeman <david@2gen.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* based on i810-tco.c which is in turn based on softdog.c
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*
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* The timer is implemented in the following I/O controller hubs:
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* (See the intel documentation on http://developer.intel.com.)
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* 6300ESB chip : document number 300641-004
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*
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* 2004YYZZ Ross Biro
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* Initial version 0.01
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* 2004YYZZ Ross Biro
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* Version 0.02
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* 20050210 David Härdeman <david@2gen.com>
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* Ported driver to kernel 2.6
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* 20171016 Radu Rendec <rrendec@arista.com>
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* Change driver to use the watchdog subsystem
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* Add support for multiple 6300ESB devices
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*/
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/*
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* Includes, defines, variables, module parameters, ...
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/pci.h>
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#include <linux/ioport.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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/* Module and version information */
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#define ESB_MODULE_NAME "i6300ESB timer"
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/* PCI configuration registers */
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#define ESB_CONFIG_REG 0x60 /* Config register */
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#define ESB_LOCK_REG 0x68 /* WDT lock register */
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/* Memory mapped registers */
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#define ESB_TIMER1_REG(w) ((w)->base + 0x00)/* Timer1 value after each reset */
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#define ESB_TIMER2_REG(w) ((w)->base + 0x04)/* Timer2 value after each reset */
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#define ESB_GINTSR_REG(w) ((w)->base + 0x08)/* General Interrupt Status Reg */
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#define ESB_RELOAD_REG(w) ((w)->base + 0x0c)/* Reload register */
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/* Lock register bits */
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#define ESB_WDT_FUNC (0x01 << 2) /* Watchdog functionality */
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#define ESB_WDT_ENABLE (0x01 << 1) /* Enable WDT */
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#define ESB_WDT_LOCK (0x01 << 0) /* Lock (nowayout) */
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/* Config register bits */
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#define ESB_WDT_REBOOT (0x01 << 5) /* Enable reboot on timeout */
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#define ESB_WDT_FREQ (0x01 << 2) /* Decrement frequency */
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#define ESB_WDT_INTTYPE (0x03 << 0) /* Interrupt type on timer1 timeout */
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/* Reload register bits */
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#define ESB_WDT_TIMEOUT (0x01 << 9) /* Watchdog timed out */
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#define ESB_WDT_RELOAD (0x01 << 8) /* prevent timeout */
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/* Magic constants */
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#define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */
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#define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */
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/* module parameters */
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/* 30 sec default heartbeat (1 < heartbeat < 2*1023) */
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#define ESB_HEARTBEAT_MIN 1
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#define ESB_HEARTBEAT_MAX 2046
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#define ESB_HEARTBEAT_DEFAULT 30
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#define ESB_HEARTBEAT_RANGE __MODULE_STRING(ESB_HEARTBEAT_MIN) \
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"<heartbeat<" __MODULE_STRING(ESB_HEARTBEAT_MAX)
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static int heartbeat; /* in seconds */
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat,
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"Watchdog heartbeat in seconds. (" ESB_HEARTBEAT_RANGE
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", default=" __MODULE_STRING(ESB_HEARTBEAT_DEFAULT) ")");
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout,
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"Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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/* internal variables */
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struct esb_dev {
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struct watchdog_device wdd;
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void __iomem *base;
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struct pci_dev *pdev;
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};
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#define to_esb_dev(wptr) container_of(wptr, struct esb_dev, wdd)
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/*
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* Some i6300ESB specific functions
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*/
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/*
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* Prepare for reloading the timer by unlocking the proper registers.
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* This is performed by first writing 0x80 followed by 0x86 to the
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* reload register. After this the appropriate registers can be written
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* to once before they need to be unlocked again.
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*/
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static inline void esb_unlock_registers(struct esb_dev *edev)
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{
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writew(ESB_UNLOCK1, ESB_RELOAD_REG(edev));
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writew(ESB_UNLOCK2, ESB_RELOAD_REG(edev));
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}
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static int esb_timer_start(struct watchdog_device *wdd)
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{
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struct esb_dev *edev = to_esb_dev(wdd);
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int _wdd_nowayout = test_bit(WDOG_NO_WAY_OUT, &wdd->status);
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u8 val;
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esb_unlock_registers(edev);
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writew(ESB_WDT_RELOAD, ESB_RELOAD_REG(edev));
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/* Enable or Enable + Lock? */
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val = ESB_WDT_ENABLE | (_wdd_nowayout ? ESB_WDT_LOCK : 0x00);
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pci_write_config_byte(edev->pdev, ESB_LOCK_REG, val);
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return 0;
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}
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static int esb_timer_stop(struct watchdog_device *wdd)
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{
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struct esb_dev *edev = to_esb_dev(wdd);
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u8 val;
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/* First, reset timers as suggested by the docs */
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esb_unlock_registers(edev);
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writew(ESB_WDT_RELOAD, ESB_RELOAD_REG(edev));
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/* Then disable the WDT */
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pci_write_config_byte(edev->pdev, ESB_LOCK_REG, 0x0);
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pci_read_config_byte(edev->pdev, ESB_LOCK_REG, &val);
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/* Returns 0 if the timer was disabled, non-zero otherwise */
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return val & ESB_WDT_ENABLE;
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}
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static int esb_timer_keepalive(struct watchdog_device *wdd)
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{
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struct esb_dev *edev = to_esb_dev(wdd);
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esb_unlock_registers(edev);
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writew(ESB_WDT_RELOAD, ESB_RELOAD_REG(edev));
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/* FIXME: Do we need to flush anything here? */
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return 0;
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}
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static int esb_timer_set_heartbeat(struct watchdog_device *wdd,
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unsigned int time)
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{
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struct esb_dev *edev = to_esb_dev(wdd);
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u32 val;
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/* We shift by 9, so if we are passed a value of 1 sec,
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* val will be 1 << 9 = 512, then write that to two
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* timers => 2 * 512 = 1024 (which is decremented at 1KHz)
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*/
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val = time << 9;
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/* Write timer 1 */
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esb_unlock_registers(edev);
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writel(val, ESB_TIMER1_REG(edev));
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/* Write timer 2 */
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esb_unlock_registers(edev);
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writel(val, ESB_TIMER2_REG(edev));
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/* Reload */
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esb_unlock_registers(edev);
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writew(ESB_WDT_RELOAD, ESB_RELOAD_REG(edev));
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/* FIXME: Do we need to flush everything out? */
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/* Done */
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wdd->timeout = time;
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return 0;
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}
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/*
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* Watchdog Subsystem Interfaces
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*/
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static struct watchdog_info esb_info = {
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.identity = ESB_MODULE_NAME,
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
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};
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static const struct watchdog_ops esb_ops = {
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.owner = THIS_MODULE,
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.start = esb_timer_start,
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.stop = esb_timer_stop,
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.set_timeout = esb_timer_set_heartbeat,
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.ping = esb_timer_keepalive,
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};
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/*
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* Data for PCI driver interface
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*/
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static const struct pci_device_id esb_pci_tbl[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
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{ 0, }, /* End of list */
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};
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MODULE_DEVICE_TABLE(pci, esb_pci_tbl);
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/*
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* Init & exit routines
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*/
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static unsigned char esb_getdevice(struct esb_dev *edev)
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{
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if (pci_enable_device(edev->pdev)) {
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dev_err(&edev->pdev->dev, "failed to enable device\n");
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goto err_devput;
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}
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if (pci_request_region(edev->pdev, 0, ESB_MODULE_NAME)) {
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dev_err(&edev->pdev->dev, "failed to request region\n");
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goto err_disable;
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}
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edev->base = pci_ioremap_bar(edev->pdev, 0);
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if (edev->base == NULL) {
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/* Something's wrong here, BASEADDR has to be set */
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dev_err(&edev->pdev->dev, "failed to get BASEADDR\n");
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goto err_release;
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}
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/* Done */
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dev_set_drvdata(&edev->pdev->dev, edev);
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return 1;
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err_release:
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pci_release_region(edev->pdev, 0);
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err_disable:
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pci_disable_device(edev->pdev);
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err_devput:
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return 0;
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}
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static void esb_initdevice(struct esb_dev *edev)
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{
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u8 val1;
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u16 val2;
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/*
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* Config register:
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* Bit 5 : 0 = Enable WDT_OUTPUT
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* Bit 2 : 0 = set the timer frequency to the PCI clock
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* divided by 2^15 (approx 1KHz).
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* Bits 1:0 : 11 = WDT_INT_TYPE Disabled.
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* The watchdog has two timers, it can be setup so that the
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* expiry of timer1 results in an interrupt and the expiry of
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* timer2 results in a reboot. We set it to not generate
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* any interrupts as there is not much we can do with it
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* right now.
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*/
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pci_write_config_word(edev->pdev, ESB_CONFIG_REG, 0x0003);
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/* Check that the WDT isn't already locked */
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pci_read_config_byte(edev->pdev, ESB_LOCK_REG, &val1);
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if (val1 & ESB_WDT_LOCK)
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dev_warn(&edev->pdev->dev, "nowayout already set\n");
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/* Set the timer to watchdog mode and disable it for now */
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pci_write_config_byte(edev->pdev, ESB_LOCK_REG, 0x00);
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/* Check if the watchdog was previously triggered */
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esb_unlock_registers(edev);
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val2 = readw(ESB_RELOAD_REG(edev));
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if (val2 & ESB_WDT_TIMEOUT)
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edev->wdd.bootstatus = WDIOF_CARDRESET;
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/* Reset WDT_TIMEOUT flag and timers */
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esb_unlock_registers(edev);
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writew((ESB_WDT_TIMEOUT | ESB_WDT_RELOAD), ESB_RELOAD_REG(edev));
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/* And set the correct timeout value */
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esb_timer_set_heartbeat(&edev->wdd, edev->wdd.timeout);
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}
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static int esb_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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struct esb_dev *edev;
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int ret;
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edev = devm_kzalloc(&pdev->dev, sizeof(*edev), GFP_KERNEL);
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if (!edev)
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return -ENOMEM;
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/* Check whether or not the hardware watchdog is there */
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edev->pdev = pdev;
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if (!esb_getdevice(edev))
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return -ENODEV;
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/* Initialize the watchdog and make sure it does not run */
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edev->wdd.info = &esb_info;
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edev->wdd.ops = &esb_ops;
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edev->wdd.min_timeout = ESB_HEARTBEAT_MIN;
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edev->wdd.max_timeout = ESB_HEARTBEAT_MAX;
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edev->wdd.timeout = ESB_HEARTBEAT_DEFAULT;
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if (watchdog_init_timeout(&edev->wdd, heartbeat, NULL))
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dev_info(&pdev->dev,
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"heartbeat value must be " ESB_HEARTBEAT_RANGE
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", using %u\n", edev->wdd.timeout);
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watchdog_set_nowayout(&edev->wdd, nowayout);
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watchdog_stop_on_reboot(&edev->wdd);
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watchdog_stop_on_unregister(&edev->wdd);
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esb_initdevice(edev);
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/* Register the watchdog so that userspace has access to it */
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ret = watchdog_register_device(&edev->wdd);
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if (ret != 0) {
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dev_err(&pdev->dev,
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"cannot register watchdog device (err=%d)\n", ret);
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goto err_unmap;
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}
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dev_info(&pdev->dev,
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"initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
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edev->base, edev->wdd.timeout, nowayout);
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return 0;
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err_unmap:
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iounmap(edev->base);
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pci_release_region(edev->pdev, 0);
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pci_disable_device(edev->pdev);
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return ret;
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}
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static void esb_remove(struct pci_dev *pdev)
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{
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struct esb_dev *edev = dev_get_drvdata(&pdev->dev);
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watchdog_unregister_device(&edev->wdd);
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iounmap(edev->base);
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pci_release_region(edev->pdev, 0);
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pci_disable_device(edev->pdev);
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}
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static struct pci_driver esb_driver = {
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.name = ESB_MODULE_NAME,
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.id_table = esb_pci_tbl,
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.probe = esb_probe,
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.remove = esb_remove,
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};
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module_pci_driver(esb_driver);
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MODULE_AUTHOR("Ross Biro and David Härdeman");
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MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
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MODULE_LICENSE("GPL");
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