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c736c9a955
SM8650 based on the diffstat. Otherwise this is a collection of non-critical fixes and cleanups to various clk drivers and their DT bindings. Nothing is changed in the core clk framework this time, although there's a patch to fix a basic clk type initialization function. In general, this pile looks to be on the smaller side. New Drivers: - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650 - Mediatek MT7988 SoC clocks Updates: - Update Zynqmp driver for Versal NET platforms - Add clk driver for Versal clocking wizard IP - Support for stm32mp25 clks - Add glitch free PLL setting support to si5351 clk driver - Add DSI clocks on Amlogic g12/sm1 - Add CSI and ISP clocks on Amlogic g12/sm1 - Document bindings for i.MX93 ANATOP clock driver - Free clk_node in i.MX SCU driver for resource with different owner - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15 - Fix the name of the fvco in i.MX pll14xx by renaming it to fout - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC - Add interrupt controller and Ethernet clocks and resets on Renesas RZ/G3S - Check reset monitor registers on Renesas RZ/G2L-alike SoCs - Reuse reset functionality in the Renesas RZ/G2L clock driver - Global and RPMh clock support for the Qualcomm X1E80100 SoC - Support for the Stromer APCS PLL found in Qualcomm IPQ5018 - Add a new type of branch clock, with support for controlling separate memory control bits, to the Qualcomm clk driver - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000 and QRU1000 - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939 - Add support for the camera clock controller on Qualcomm SC8280XP - Correct PLL configuration in GPU and video clock controllers for Qualcomm SM8150 - Add runtime PM support and a few missing resets to Qualcomm SM8150 video clock controller - Fix configuration of various GCC GDSCs on Qualcomm SM8550 - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver - Fix up GPU and display clock controllers PLL configuration settings on Qualcomm SM8550 - Cleanup variable init in Allwinner nkm module - Convert various DT bindings to YAML - A few kernel-doc fixes for Samsung SoC clock controllers -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmWdydURHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSXvtQ//eoF6kwlLT9knQIE9sYQAPJrHytObVpSl 3htHQBvSMKwJNTmzWbKWIUw9T7JliYU+aho768zKqVMVLd6PWk1eOL0NIKB/jSSz /OIWxS9hrcTXm/GAKX+0jyAxw97pq0Qb82PNpD+QuLAcVw/5rMVl/+pMNqeVeqjK 2aN4QfaL7B1F1vV/rBtniG1//Hwwr7IMIT3wIBE6W4jlw84N2gayqEl/EaXabF6F +9Wh8bPS1ny206XGtI8KNcFkv/uFoqWjO7g/hPgXMQcVSd50oV02iJPf6HaWBx4L 9podF3uhNuNk5v02fp1nCygzRn2YDa4eMwMjJtSxU0Inq9s01u8dWNkIgwuCJMjv jSKMMgxa9rHhJ7+xiYi1pQ23fHG1tx600u1zKWMkO1a0U80KeeynGFpdfhUzsD6E ZNUkEee2Ehw1nDMfrUqUt9dWLnRutCXa5jTvgKBWFM7hs9W+ErudAKwP0x2hNl3Z q8Z6RpCoGNnb1e0nw407j3AsXJkbzg9D4KGMlNNEVmuP0iZY3IsVIWrhszx0Zmi4 M3sNNtTskbD4nX42JADhZgVpql2rSikxjfnaBsSXYSJu9SGkCF9clOSb1lKGgKmk gCWcGpmxdmVbTNYCgsZ/jUBs8QDgOxcyFJYLys7/tkjDec9IuxeB37vkaXv2rqU8 t0VzUVWUqYw= =t0CI -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "Only a couple new SoCs have support added this time, primarily for Qualcomm SM8650 based on the diffstat. Otherwise this is a collection of non-critical fixes and cleanups to various clk drivers and their DT bindings. Nothing is changed in the core clk framework this time, although there's a patch to fix a basic clk type initialization function. In general, this pile looks to be on the smaller side. New Drivers: - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650 - Mediatek MT7988 SoC clocks Updates: - Update Zynqmp driver for Versal NET platforms - Add clk driver for Versal clocking wizard IP - Support for stm32mp25 clks - Add glitch free PLL setting support to si5351 clk driver - Add DSI clocks on Amlogic g12/sm1 - Add CSI and ISP clocks on Amlogic g12/sm1 - Document bindings for i.MX93 ANATOP clock driver - Free clk_node in i.MX SCU driver for resource with different owner - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15 - Fix the name of the fvco in i.MX pll14xx by renaming it to fout - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC - Add interrupt controller and Ethernet clocks and resets on Renesas RZ/G3S - Check reset monitor registers on Renesas RZ/G2L-alike SoCs - Reuse reset functionality in the Renesas RZ/G2L clock driver - Global and RPMh clock support for the Qualcomm X1E80100 SoC - Support for the Stromer APCS PLL found in Qualcomm IPQ5018 - Add a new type of branch clock, with support for controlling separate memory control bits, to the Qualcomm clk driver - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000 and QRU1000 - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939 - Add support for the camera clock controller on Qualcomm SC8280XP - Correct PLL configuration in GPU and video clock controllers for Qualcomm SM8150 - Add runtime PM support and a few missing resets to Qualcomm SM8150 video clock controller - Fix configuration of various GCC GDSCs on Qualcomm SM8550 - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver - Fix up GPU and display clock controllers PLL configuration settings on Qualcomm SM8550 - Cleanup variable init in Allwinner nkm module - Convert various DT bindings to YAML - A few kernel-doc fixes for Samsung SoC clock controllers" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits) clk: mediatek: add drivers for MT7988 SoC clk: mediatek: add pcw_chg_bit control for PLLs of MT7988 dt-bindings: clock: mediatek: add clock controllers of MT7988 dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs dt-bindings: clock: mediatek: add MT7988 clock IDs clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes clk: mediatek: clk-mux: Support custom parent indices for muxes dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx clk: starfive: Add flags argument to JH71X0__MUX macro clk: imx: pll14xx: change naming of fvco to fout clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu() clk: fixed-rate: fix clk_hw_register_fixed_rate_with_accuracy_parent_hw clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config clk: qcom: dispcc-sm8550: Use the correct PLL configuration function clk: qcom: dispcc-sm8550: Update disp PLL settings clk: qcom: gpucc-sm8550: Update GPU PLL settings ... |
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.. | ||
actions | ||
analogbits | ||
at91 | ||
axis | ||
axs10x | ||
baikal-t1 | ||
bcm | ||
berlin | ||
davinci | ||
hisilicon | ||
imgtec | ||
imx | ||
ingenic | ||
keystone | ||
mediatek | ||
meson | ||
microchip | ||
mmp | ||
mstar | ||
mvebu | ||
mxs | ||
nuvoton | ||
nxp | ||
pistachio | ||
pxa | ||
qcom | ||
ralink | ||
renesas | ||
rockchip | ||
samsung | ||
sifive | ||
socfpga | ||
spear | ||
sprd | ||
st | ||
starfive | ||
stm32 | ||
sunxi | ||
sunxi-ng | ||
tegra | ||
ti | ||
uniphier | ||
ux500 | ||
versatile | ||
visconti | ||
x86 | ||
xilinx | ||
zynq | ||
zynqmp | ||
.kunitconfig | ||
clk_test.c | ||
clk-apple-nco.c | ||
clk-asm9260.c | ||
clk-aspeed.c | ||
clk-aspeed.h | ||
clk-ast2600.c | ||
clk-axi-clkgen.c | ||
clk-axm5516.c | ||
clk-bd718x7.c | ||
clk-bm1880.c | ||
clk-bulk.c | ||
clk-cdce706.c | ||
clk-cdce925.c | ||
clk-clps711x.c | ||
clk-composite.c | ||
clk-conf.c | ||
clk-cs2000-cp.c | ||
clk-devres.c | ||
clk-divider.c | ||
clk-en7523.c | ||
clk-fixed-factor.c | ||
clk-fixed-mmio.c | ||
clk-fixed-rate.c | ||
clk-fractional-divider_test.c | ||
clk-fractional-divider.c | ||
clk-fractional-divider.h | ||
clk-fsl-flexspi.c | ||
clk-fsl-sai.c | ||
clk-gate_test.c | ||
clk-gate.c | ||
clk-gemini.c | ||
clk-gpio.c | ||
clk-hi655x.c | ||
clk-highbank.c | ||
clk-hsdk-pll.c | ||
clk-k210.c | ||
clk-lan966x.c | ||
clk-lmk04832.c | ||
clk-lochnagar.c | ||
clk-loongson1.c | ||
clk-loongson2.c | ||
clk-max9485.c | ||
clk-max77686.c | ||
clk-milbeaut.c | ||
clk-moxart.c | ||
clk-multiplier.c | ||
clk-mux.c | ||
clk-nomadik.c | ||
clk-npcm7xx.c | ||
clk-nspire.c | ||
clk-palmas.c | ||
clk-plldig.c | ||
clk-pwm.c | ||
clk-qoriq.c | ||
clk-renesas-pcie.c | ||
clk-rk808.c | ||
clk-s2mps11.c | ||
clk-scmi.c | ||
clk-scpi.c | ||
clk-si514.c | ||
clk-si521xx.c | ||
clk-si544.c | ||
clk-si570.c | ||
clk-si5341.c | ||
clk-si5351.c | ||
clk-si5351.h | ||
clk-sp7021.c | ||
clk-sparx5.c | ||
clk-stm32f4.c | ||
clk-stm32h7.c | ||
clk-tps68470.c | ||
clk-twl6040.c | ||
clk-twl.c | ||
clk-versaclock3.c | ||
clk-versaclock5.c | ||
clk-versaclock7.c | ||
clk-vt8500.c | ||
clk-wm831x.c | ||
clk-xgene.c | ||
clk.c | ||
clk.h | ||
clkdev.c | ||
Kconfig | ||
Makefile |