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0b8f1efad3
Impact: new feature Problem on distro kernels: irq_desc[NR_IRQS] takes megabytes of RAM with NR_CPUS set to large values. The goal is to be able to scale up to much larger NR_IRQS value without impacting the (important) common case. To solve this, we generalize irq_desc[NR_IRQS] to an (optional) array of irq_desc pointers. When CONFIG_SPARSE_IRQ=y is used, we use kzalloc_node to get irq_desc, this also makes the IRQ descriptors NUMA-local (to the site that calls request_irq()). This gets rid of the irq_cfg[] static array on x86 as well: irq_cfg now uses desc->chip_data for x86 to store irq_cfg. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
162 lines
3.5 KiB
C
162 lines
3.5 KiB
C
/*
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* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
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*
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* This file contains the lowest level x86_64-specific interrupt
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* entry and irq statistics code. All the remaining irq logic is
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* done by the generic kernel/irq/ code and in the
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* x86_64-specific irq controller code. (e.g. i8259.c and
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* io_apic.c.)
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*/
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#include <linux/kernel_stat.h>
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#include <linux/interrupt.h>
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#include <linux/seq_file.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <asm/uaccess.h>
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#include <asm/io_apic.h>
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#include <asm/idle.h>
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#include <asm/smp.h>
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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/*
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* Probabilistic stack overflow check:
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*
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* Only check the stack in process context, because everything else
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* runs on the big interrupt stacks. Checking reliably is too expensive,
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* so we just check from interrupts.
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*/
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static inline void stack_overflow_check(struct pt_regs *regs)
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{
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u64 curbase = (u64)task_stack_page(current);
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static unsigned long warned = -60*HZ;
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if (regs->sp >= curbase && regs->sp <= curbase + THREAD_SIZE &&
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regs->sp < curbase + sizeof(struct thread_info) + 128 &&
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time_after(jiffies, warned + 60*HZ)) {
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printk("do_IRQ: %s near stack overflow (cur:%Lx,sp:%lx)\n",
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current->comm, curbase, regs->sp);
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show_stack(NULL,NULL);
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warned = jiffies;
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}
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}
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#endif
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/*
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* do_IRQ handles all normal device IRQ's (the special
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* SMP cross-CPU interrupts have their own specific
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* handlers).
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*/
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asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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struct irq_desc *desc;
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/* high bit used in ret_from_ code */
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unsigned vector = ~regs->orig_ax;
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unsigned irq;
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exit_idle();
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irq_enter();
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irq = __get_cpu_var(vector_irq)[vector];
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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stack_overflow_check(regs);
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#endif
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desc = irq_to_desc(irq);
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if (likely(desc))
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generic_handle_irq_desc(irq, desc);
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else {
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if (!disable_apic)
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ack_APIC_irq();
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if (printk_ratelimit())
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printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n",
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__func__, smp_processor_id(), vector);
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}
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irq_exit();
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set_irq_regs(old_regs);
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return 1;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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void fixup_irqs(cpumask_t map)
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{
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unsigned int irq;
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static int warned;
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struct irq_desc *desc;
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for_each_irq_desc(irq, desc) {
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cpumask_t mask;
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int break_affinity = 0;
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int set_affinity = 1;
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if (!desc)
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continue;
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if (irq == 2)
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continue;
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/* interrupt's are disabled at this point */
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spin_lock(&desc->lock);
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if (!irq_has_action(irq) ||
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cpus_equal(desc->affinity, map)) {
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spin_unlock(&desc->lock);
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continue;
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}
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cpus_and(mask, desc->affinity, map);
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if (cpus_empty(mask)) {
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break_affinity = 1;
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mask = map;
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}
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if (desc->chip->mask)
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desc->chip->mask(irq);
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if (desc->chip->set_affinity)
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desc->chip->set_affinity(irq, mask);
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else if (!(warned++))
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set_affinity = 0;
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if (desc->chip->unmask)
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desc->chip->unmask(irq);
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spin_unlock(&desc->lock);
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if (break_affinity && set_affinity)
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printk("Broke affinity for irq %i\n", irq);
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else if (!set_affinity)
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printk("Cannot set affinity for irq %i\n", irq);
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}
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/* That doesn't seem sufficient. Give it 1ms. */
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local_irq_enable();
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mdelay(1);
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local_irq_disable();
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}
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#endif
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extern void call_softirq(void);
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asmlinkage void do_softirq(void)
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{
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__u32 pending;
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unsigned long flags;
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if (in_interrupt())
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return;
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local_irq_save(flags);
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pending = local_softirq_pending();
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/* Switch to interrupt stack */
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if (pending) {
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call_softirq();
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WARN_ON_ONCE(softirq_count());
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}
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local_irq_restore(flags);
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}
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