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4734406c39
With the recent rewrite of the fpu code exception handling for the
lfpc instruction within load_fpu_state() was erroneously removed.
Add it again to prevent that loading invalid floating point register
values cause an unhandled specification exception.
Fixes: 8c09871a95 ("s390/fpu: limit save and restore to used registers")
Cc: stable@vger.kernel.org
Reported-by: Aristeu Rozanski <aris@redhat.com>
Tested-by: Aristeu Rozanski <aris@redhat.com>
Reviewed-by: Vasily Gorbik <gor@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
194 lines
4.2 KiB
C
194 lines
4.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* In-kernel vector facility support functions
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*
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* Copyright IBM Corp. 2015
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* Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
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*/
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#include <linux/kernel.h>
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#include <linux/cpu.h>
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#include <linux/sched.h>
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#include <asm/fpu.h>
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void __kernel_fpu_begin(struct kernel_fpu *state, int flags)
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{
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__vector128 *vxrs = state->vxrs;
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int mask;
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/*
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* Limit the save to the FPU/vector registers already
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* in use by the previous context.
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*/
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flags &= state->hdr.mask;
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if (flags & KERNEL_FPC)
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fpu_stfpc(&state->hdr.fpc);
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if (!cpu_has_vx()) {
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if (flags & KERNEL_VXR_LOW)
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save_fp_regs_vx(vxrs);
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return;
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}
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mask = flags & KERNEL_VXR;
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if (mask == KERNEL_VXR) {
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vxrs += fpu_vstm(0, 15, vxrs);
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vxrs += fpu_vstm(16, 31, vxrs);
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return;
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}
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if (mask == KERNEL_VXR_MID) {
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vxrs += fpu_vstm(8, 23, vxrs);
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return;
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}
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mask = flags & KERNEL_VXR_LOW;
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if (mask) {
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if (mask == KERNEL_VXR_LOW)
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vxrs += fpu_vstm(0, 15, vxrs);
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else if (mask == KERNEL_VXR_V0V7)
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vxrs += fpu_vstm(0, 7, vxrs);
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else
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vxrs += fpu_vstm(8, 15, vxrs);
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}
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mask = flags & KERNEL_VXR_HIGH;
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if (mask) {
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if (mask == KERNEL_VXR_HIGH)
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vxrs += fpu_vstm(16, 31, vxrs);
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else if (mask == KERNEL_VXR_V16V23)
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vxrs += fpu_vstm(16, 23, vxrs);
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else
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vxrs += fpu_vstm(24, 31, vxrs);
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}
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}
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EXPORT_SYMBOL(__kernel_fpu_begin);
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void __kernel_fpu_end(struct kernel_fpu *state, int flags)
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{
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__vector128 *vxrs = state->vxrs;
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int mask;
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/*
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* Limit the restore to the FPU/vector registers of the
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* previous context that have been overwritten by the
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* current context.
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*/
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flags &= state->hdr.mask;
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if (flags & KERNEL_FPC)
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fpu_lfpc(&state->hdr.fpc);
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if (!cpu_has_vx()) {
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if (flags & KERNEL_VXR_LOW)
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load_fp_regs_vx(vxrs);
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return;
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}
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mask = flags & KERNEL_VXR;
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if (mask == KERNEL_VXR) {
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vxrs += fpu_vlm(0, 15, vxrs);
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vxrs += fpu_vlm(16, 31, vxrs);
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return;
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}
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if (mask == KERNEL_VXR_MID) {
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vxrs += fpu_vlm(8, 23, vxrs);
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return;
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}
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mask = flags & KERNEL_VXR_LOW;
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if (mask) {
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if (mask == KERNEL_VXR_LOW)
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vxrs += fpu_vlm(0, 15, vxrs);
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else if (mask == KERNEL_VXR_V0V7)
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vxrs += fpu_vlm(0, 7, vxrs);
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else
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vxrs += fpu_vlm(8, 15, vxrs);
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}
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mask = flags & KERNEL_VXR_HIGH;
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if (mask) {
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if (mask == KERNEL_VXR_HIGH)
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vxrs += fpu_vlm(16, 31, vxrs);
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else if (mask == KERNEL_VXR_V16V23)
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vxrs += fpu_vlm(16, 23, vxrs);
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else
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vxrs += fpu_vlm(24, 31, vxrs);
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}
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}
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EXPORT_SYMBOL(__kernel_fpu_end);
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void load_fpu_state(struct fpu *state, int flags)
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{
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__vector128 *vxrs = &state->vxrs[0];
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int mask;
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if (flags & KERNEL_FPC)
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fpu_lfpc_safe(&state->fpc);
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if (!cpu_has_vx()) {
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if (flags & KERNEL_VXR_V0V7)
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load_fp_regs_vx(state->vxrs);
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return;
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}
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mask = flags & KERNEL_VXR;
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if (mask == KERNEL_VXR) {
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fpu_vlm(0, 15, &vxrs[0]);
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fpu_vlm(16, 31, &vxrs[16]);
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return;
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}
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if (mask == KERNEL_VXR_MID) {
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fpu_vlm(8, 23, &vxrs[8]);
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return;
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}
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mask = flags & KERNEL_VXR_LOW;
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if (mask) {
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if (mask == KERNEL_VXR_LOW)
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fpu_vlm(0, 15, &vxrs[0]);
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else if (mask == KERNEL_VXR_V0V7)
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fpu_vlm(0, 7, &vxrs[0]);
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else
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fpu_vlm(8, 15, &vxrs[8]);
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}
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mask = flags & KERNEL_VXR_HIGH;
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if (mask) {
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if (mask == KERNEL_VXR_HIGH)
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fpu_vlm(16, 31, &vxrs[16]);
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else if (mask == KERNEL_VXR_V16V23)
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fpu_vlm(16, 23, &vxrs[16]);
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else
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fpu_vlm(24, 31, &vxrs[24]);
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}
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}
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void save_fpu_state(struct fpu *state, int flags)
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{
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__vector128 *vxrs = &state->vxrs[0];
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int mask;
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if (flags & KERNEL_FPC)
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fpu_stfpc(&state->fpc);
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if (!cpu_has_vx()) {
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if (flags & KERNEL_VXR_LOW)
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save_fp_regs_vx(state->vxrs);
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return;
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}
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mask = flags & KERNEL_VXR;
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if (mask == KERNEL_VXR) {
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fpu_vstm(0, 15, &vxrs[0]);
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fpu_vstm(16, 31, &vxrs[16]);
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return;
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}
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if (mask == KERNEL_VXR_MID) {
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fpu_vstm(8, 23, &vxrs[8]);
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return;
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}
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mask = flags & KERNEL_VXR_LOW;
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if (mask) {
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if (mask == KERNEL_VXR_LOW)
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fpu_vstm(0, 15, &vxrs[0]);
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else if (mask == KERNEL_VXR_V0V7)
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fpu_vstm(0, 7, &vxrs[0]);
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else
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fpu_vstm(8, 15, &vxrs[8]);
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}
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mask = flags & KERNEL_VXR_HIGH;
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if (mask) {
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if (mask == KERNEL_VXR_HIGH)
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fpu_vstm(16, 31, &vxrs[16]);
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else if (mask == KERNEL_VXR_V16V23)
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fpu_vstm(16, 23, &vxrs[16]);
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else
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fpu_vstm(24, 31, &vxrs[24]);
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}
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}
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EXPORT_SYMBOL(save_fpu_state);
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