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3601fe43e8
Core changes: - The big change this time around is the irqchip handling in the qualcomm pin controllers, closely coupled with the gpiochip. This rework, in a classic fall-between-the-chairs fashion has been sidestepped for too long. The Qualcomm IRQchips using the SPMI and SSBI transport mechanisms have been rewritten to use hierarchical irqchip. This creates the base from which I intend to gradually pull support for hierarchical irqchips into the gpiolib irqchip helpers to cut down on duplicate code. We have too many hacks in the kernel because people have been working around the missing hierarchical irqchip for years, and once it was there, noone understood it for a while. We are now slowly adapting to using it. This is why this pull requests include changes to MFD, SPMI, IRQchip core and some ARM Device Trees pertaining to the Qualcomm chip family. Since Qualcomm have so many chips and such large deployments it is paramount that this platform gets this right, and now it (hopefully) does. - Core support for pull-up and pull-down configuration, also from the device tree. When a simple GPIO chip support a "off or on" pull-up or pull-down resistor, we provide a way to set this up using machine descriptors or device tree. If more elaborate control of pull up/down (such as resistance shunt setting) is required, drivers should be phased over to use pin control. We do not yet provide a userspace ABI for this pull up-down setting but I suspect the makers are going to ask for it soon enough. PCA953x is the first user of this new API. - The GPIO mockup driver has been revamped after some discussion improving the IRQ simulator in the process. The idea is to make it possible to use the mockup for both testing and virtual prototyping, e.g. when you do not yet have a GPIO expander to play with but really want to get something to develop code around before hardware is available. It's neat. The blackbox testing usecase is currently making its way into kernelci. - ACPI GPIO core preserves non direction flags when updating flags. - A new device core helper for devm_platform_ioremap_resource() is funneled through the GPIO tree with Greg's ACK. New drivers: - TQ-Systems QTMX86 GPIO controllers (using port-mapped I/O) - Gateworks PLD GPIO driver (vaccumed up from OpenWrt) - AMD G-Series PCH (Platform Controller Hub) GPIO driver. - Fintek F81804 & F81966 subvariants. - PCA953x now supports NXP PCAL6416. Driver improvements: - IRQ support on the Nintendo Wii (Hollywood) GPIO. - get_direction() support for the MVEBU driver. - Set the right output level on SAMA5D2. - Drop the unused irq trigger setting on the Spreadtrum driver. - Wakeup support for PCA953x. - A slew of cleanups in the various Intel drivers. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcgoLEAAoJEEEQszewGV1zjBAP/3OmTFGv49PFmJwSx+PlLiYf V6/UPaQzq81CGSMtHxbS51TyP9Id7PCfsacbuFYutzn0D1efvl7jrkb8qJ6fVvCM bl/i6q8ipRTPzAf1hD3QCgCe3BXCA064/OcPrz987oIvI3bJQXsmBjBSXHWr4Cwa WfB5DX/afn9TK3XHhMQGfw5f0d+TtnKAs90RTTVKiz9Ow8eFYZJOhgPkvhCR3Gi9 YJIzIAiwhHZ7/zauo4JAYFU/O/Z3YEC5zeLne2ItebzNooRkSxdz0c9Hs7HlCZmU 930Uv9jNN89N3vPqpZzAHtPvwDOmAILMWvKy9xRSp+eoIukarRJgF7ALPk7QWxK1 yy+tGj4dXBQ6tI8W3wUN1WgjNpii3K1HbJ+1LQVQL2/q9o+3YXXqmjdjuw7C8YYV 5ystNrUppkgfIIciHL4lhqw3wKJJhVEAns2V245hIitoShT+RvIg8GQbGZmWlQFd YsHbynqHL9iwfRNv26kEqZXZOo/4D1t6Scw+OPVyba2Wyttf+qbmg+XaYMqFaxYW mfydvdtymeCOUIPJMzw58KGPUTXJ4UPLENyayXNUHokr1a8VO8OIthY7zwi0CpvJ IcsAY9zoGxvfbRV922mlIsw3oOBcM2IN2lC9sY469ZVnjBrdC3rsQpIBZr+Vzz8i YlUfXLSGSyuUZUz//2eG =VoVC -----END PGP SIGNATURE----- Merge tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v5.1 cycle: Core changes: - The big change this time around is the irqchip handling in the qualcomm pin controllers, closely coupled with the gpiochip. This rework, in a classic fall-between-the-chairs fashion has been sidestepped for too long. The Qualcomm IRQchips using the SPMI and SSBI transport mechanisms have been rewritten to use hierarchical irqchip. This creates the base from which I intend to gradually pull support for hierarchical irqchips into the gpiolib irqchip helpers to cut down on duplicate code. We have too many hacks in the kernel because people have been working around the missing hierarchical irqchip for years, and once it was there, noone understood it for a while. We are now slowly adapting to using it. This is why this pull requests include changes to MFD, SPMI, IRQchip core and some ARM Device Trees pertaining to the Qualcomm chip family. Since Qualcomm have so many chips and such large deployments it is paramount that this platform gets this right, and now it (hopefully) does. - Core support for pull-up and pull-down configuration, also from the device tree. When a simple GPIO chip supports an "off or on" pull-up or pull-down resistor, we provide a way to set this up using machine descriptors or device tree. If more elaborate control of pull up/down (such as resistance shunt setting) is required, drivers should be phased over to use pin control. We do not yet provide a userspace ABI for this pull up-down setting but I suspect the makers are going to ask for it soon enough. PCA953x is the first user of this new API. - The GPIO mockup driver has been revamped after some discussion improving the IRQ simulator in the process. The idea is to make it possible to use the mockup for both testing and virtual prototyping, e.g. when you do not yet have a GPIO expander to play with but really want to get something to develop code around before hardware is available. It's neat. The blackbox testing usecase is currently making its way into kernelci. - ACPI GPIO core preserves non direction flags when updating flags. - A new device core helper for devm_platform_ioremap_resource() is funneled through the GPIO tree with Greg's ACK. New drivers: - TQ-Systems QTMX86 GPIO controllers (using port-mapped I/O) - Gateworks PLD GPIO driver (vaccumed up from OpenWrt) - AMD G-Series PCH (Platform Controller Hub) GPIO driver. - Fintek F81804 & F81966 subvariants. - PCA953x now supports NXP PCAL6416. Driver improvements: - IRQ support on the Nintendo Wii (Hollywood) GPIO. - get_direction() support for the MVEBU driver. - Set the right output level on SAMA5D2. - Drop the unused irq trigger setting on the Spreadtrum driver. - Wakeup support for PCA953x. - A slew of cleanups in the various Intel drivers" * tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (110 commits) gpio: gpio-omap: fix level interrupt idling gpio: amd-fch: Set proper output level for direction_output x86: apuv2: remove unused variable gpio: pca953x: Use PCA_LATCH_INT platform/x86: fix PCENGINES_APU2 Kconfig warning gpio: pca953x: Fix dereference of irq data in shutdown gpio: amd-fch: Fix type error found by sparse gpio: amd-fch: Drop const from resource gpio: mxc: add check to return defer probe if clock tree NOT ready gpio: ftgpio: Register per-instance irqchip gpio: ixp4xx: Add DT bindings x86: pcengines apuv2 gpio/leds/keys platform driver gpio: AMD G-Series PCH gpio driver drivers: depend on HAS_IOMEM for devm_platform_ioremap_resource() gpio: tqmx86: Set proper output level for direction_output gpio: sprd: Change to use SoC compatible string gpio: sprd: Use SoC compatible string instead of wildcard string gpio: of: Handle both enable-gpio{,s} gpio: of: Restrict enable-gpio quirk to regulator-gpio gpio: davinci: use devm_platform_ioremap_resource() ...
728 lines
18 KiB
C
728 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* OF helpers for the GPIO API
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*
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* Copyright (c) 2007-2008 MontaVista Software, Inc.
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*
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* Author: Anton Vorontsov <avorontsov@ru.mvista.com>
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/gpio/consumer.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_gpio.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/slab.h>
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#include <linux/gpio/machine.h>
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#include "gpiolib.h"
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static int of_gpiochip_match_node_and_xlate(struct gpio_chip *chip, void *data)
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{
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struct of_phandle_args *gpiospec = data;
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return chip->gpiodev->dev.of_node == gpiospec->np &&
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chip->of_xlate &&
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chip->of_xlate(chip, gpiospec, NULL) >= 0;
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}
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static struct gpio_chip *of_find_gpiochip_by_xlate(
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struct of_phandle_args *gpiospec)
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{
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return gpiochip_find(gpiospec, of_gpiochip_match_node_and_xlate);
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}
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static struct gpio_desc *of_xlate_and_get_gpiod_flags(struct gpio_chip *chip,
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struct of_phandle_args *gpiospec,
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enum of_gpio_flags *flags)
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{
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int ret;
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if (chip->of_gpio_n_cells != gpiospec->args_count)
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return ERR_PTR(-EINVAL);
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ret = chip->of_xlate(chip, gpiospec, flags);
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if (ret < 0)
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return ERR_PTR(ret);
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return gpiochip_get_desc(chip, ret);
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}
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static void of_gpio_flags_quirks(struct device_node *np,
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const char *propname,
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enum of_gpio_flags *flags,
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int index)
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{
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/*
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* Handle MMC "cd-inverted" and "wp-inverted" semantics.
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*/
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if (IS_ENABLED(CONFIG_MMC)) {
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/*
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* Active low is the default according to the
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* SDHCI specification and the device tree
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* bindings. However the code in the current
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* kernel was written such that the phandle
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* flags were always respected, and "cd-inverted"
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* would invert the flag from the device phandle.
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*/
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if (!strcmp(propname, "cd-gpios")) {
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if (of_property_read_bool(np, "cd-inverted"))
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*flags ^= OF_GPIO_ACTIVE_LOW;
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}
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if (!strcmp(propname, "wp-gpios")) {
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if (of_property_read_bool(np, "wp-inverted"))
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*flags ^= OF_GPIO_ACTIVE_LOW;
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}
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}
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/*
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* Some GPIO fixed regulator quirks.
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* Note that active low is the default.
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*/
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if (IS_ENABLED(CONFIG_REGULATOR) &&
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(of_device_is_compatible(np, "regulator-fixed") ||
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of_device_is_compatible(np, "reg-fixed-voltage") ||
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(of_device_is_compatible(np, "regulator-gpio") &&
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!(strcmp(propname, "enable-gpio") &&
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strcmp(propname, "enable-gpios"))))) {
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/*
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* The regulator GPIO handles are specified such that the
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* presence or absence of "enable-active-high" solely controls
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* the polarity of the GPIO line. Any phandle flags must
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* be actively ignored.
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*/
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if (*flags & OF_GPIO_ACTIVE_LOW) {
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pr_warn("%s GPIO handle specifies active low - ignored\n",
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of_node_full_name(np));
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*flags &= ~OF_GPIO_ACTIVE_LOW;
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}
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if (!of_property_read_bool(np, "enable-active-high"))
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*flags |= OF_GPIO_ACTIVE_LOW;
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}
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/*
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* Legacy open drain handling for fixed voltage regulators.
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*/
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if (IS_ENABLED(CONFIG_REGULATOR) &&
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of_device_is_compatible(np, "reg-fixed-voltage") &&
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of_property_read_bool(np, "gpio-open-drain")) {
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*flags |= (OF_GPIO_SINGLE_ENDED | OF_GPIO_OPEN_DRAIN);
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pr_info("%s uses legacy open drain flag - update the DTS if you can\n",
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of_node_full_name(np));
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}
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/*
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* Legacy handling of SPI active high chip select. If we have a
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* property named "cs-gpios" we need to inspect the child node
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* to determine if the flags should have inverted semantics.
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*/
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if (IS_ENABLED(CONFIG_SPI_MASTER) &&
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of_property_read_bool(np, "cs-gpios")) {
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struct device_node *child;
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u32 cs;
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int ret;
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for_each_child_of_node(np, child) {
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ret = of_property_read_u32(child, "reg", &cs);
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if (ret)
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continue;
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if (cs == index) {
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/*
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* SPI children have active low chip selects
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* by default. This can be specified negatively
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* by just omitting "spi-cs-high" in the
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* device node, or actively by tagging on
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* GPIO_ACTIVE_LOW as flag in the device
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* tree. If the line is simultaneously
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* tagged as active low in the device tree
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* and has the "spi-cs-high" set, we get a
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* conflict and the "spi-cs-high" flag will
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* take precedence.
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*/
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if (of_property_read_bool(np, "spi-cs-high")) {
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if (*flags & OF_GPIO_ACTIVE_LOW) {
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pr_warn("%s GPIO handle specifies active low - ignored\n",
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of_node_full_name(np));
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*flags &= ~OF_GPIO_ACTIVE_LOW;
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}
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} else {
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if (!(*flags & OF_GPIO_ACTIVE_LOW))
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pr_info("%s enforce active low on chipselect handle\n",
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of_node_full_name(np));
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*flags |= OF_GPIO_ACTIVE_LOW;
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}
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break;
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}
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}
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}
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}
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/**
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* of_get_named_gpiod_flags() - Get a GPIO descriptor and flags for GPIO API
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* @np: device node to get GPIO from
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* @propname: property name containing gpio specifier(s)
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* @index: index of the GPIO
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* @flags: a flags pointer to fill in
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*
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* Returns GPIO descriptor to use with Linux GPIO API, or one of the errno
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* value on the error condition. If @flags is not NULL the function also fills
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* in flags for the GPIO.
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*/
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struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
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const char *propname, int index, enum of_gpio_flags *flags)
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{
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struct of_phandle_args gpiospec;
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struct gpio_chip *chip;
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struct gpio_desc *desc;
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int ret;
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ret = of_parse_phandle_with_args_map(np, propname, "gpio", index,
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&gpiospec);
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if (ret) {
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pr_debug("%s: can't parse '%s' property of node '%pOF[%d]'\n",
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__func__, propname, np, index);
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return ERR_PTR(ret);
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}
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chip = of_find_gpiochip_by_xlate(&gpiospec);
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if (!chip) {
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desc = ERR_PTR(-EPROBE_DEFER);
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goto out;
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}
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desc = of_xlate_and_get_gpiod_flags(chip, &gpiospec, flags);
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if (IS_ERR(desc))
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goto out;
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if (flags)
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of_gpio_flags_quirks(np, propname, flags, index);
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pr_debug("%s: parsed '%s' property of node '%pOF[%d]' - status (%d)\n",
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__func__, propname, np, index,
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PTR_ERR_OR_ZERO(desc));
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out:
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of_node_put(gpiospec.np);
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return desc;
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}
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int of_get_named_gpio_flags(struct device_node *np, const char *list_name,
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int index, enum of_gpio_flags *flags)
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{
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struct gpio_desc *desc;
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desc = of_get_named_gpiod_flags(np, list_name, index, flags);
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if (IS_ERR(desc))
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return PTR_ERR(desc);
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else
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return desc_to_gpio(desc);
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}
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EXPORT_SYMBOL(of_get_named_gpio_flags);
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/*
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* The SPI GPIO bindings happened before we managed to establish that GPIO
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* properties should be named "foo-gpios" so we have this special kludge for
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* them.
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*/
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static struct gpio_desc *of_find_spi_gpio(struct device *dev, const char *con_id,
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enum of_gpio_flags *of_flags)
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{
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char prop_name[32]; /* 32 is max size of property name */
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struct device_node *np = dev->of_node;
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struct gpio_desc *desc;
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/*
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* Hopefully the compiler stubs the rest of the function if this
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* is false.
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*/
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if (!IS_ENABLED(CONFIG_SPI_MASTER))
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return ERR_PTR(-ENOENT);
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/* Allow this specifically for "spi-gpio" devices */
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if (!of_device_is_compatible(np, "spi-gpio") || !con_id)
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return ERR_PTR(-ENOENT);
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/* Will be "gpio-sck", "gpio-mosi" or "gpio-miso" */
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snprintf(prop_name, sizeof(prop_name), "%s-%s", "gpio", con_id);
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desc = of_get_named_gpiod_flags(np, prop_name, 0, of_flags);
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return desc;
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}
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/*
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* Some regulator bindings happened before we managed to establish that GPIO
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* properties should be named "foo-gpios" so we have this special kludge for
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* them.
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*/
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static struct gpio_desc *of_find_regulator_gpio(struct device *dev, const char *con_id,
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enum of_gpio_flags *of_flags)
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{
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/* These are the connection IDs we accept as legacy GPIO phandles */
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const char *whitelist[] = {
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"wlf,ldoena", /* Arizona */
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"wlf,ldo1ena", /* WM8994 */
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"wlf,ldo2ena", /* WM8994 */
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};
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struct device_node *np = dev->of_node;
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struct gpio_desc *desc;
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int i;
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if (!IS_ENABLED(CONFIG_REGULATOR))
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return ERR_PTR(-ENOENT);
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if (!con_id)
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return ERR_PTR(-ENOENT);
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i = match_string(whitelist, ARRAY_SIZE(whitelist), con_id);
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if (i < 0)
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return ERR_PTR(-ENOENT);
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desc = of_get_named_gpiod_flags(np, con_id, 0, of_flags);
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return desc;
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}
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struct gpio_desc *of_find_gpio(struct device *dev, const char *con_id,
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unsigned int idx,
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enum gpio_lookup_flags *flags)
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{
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char prop_name[32]; /* 32 is max size of property name */
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enum of_gpio_flags of_flags;
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struct gpio_desc *desc;
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unsigned int i;
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/* Try GPIO property "foo-gpios" and "foo-gpio" */
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for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
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if (con_id)
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snprintf(prop_name, sizeof(prop_name), "%s-%s", con_id,
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gpio_suffixes[i]);
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else
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snprintf(prop_name, sizeof(prop_name), "%s",
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gpio_suffixes[i]);
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desc = of_get_named_gpiod_flags(dev->of_node, prop_name, idx,
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&of_flags);
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/*
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* -EPROBE_DEFER in our case means that we found a
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* valid GPIO property, but no controller has been
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* registered so far.
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*
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* This means we don't need to look any further for
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* alternate name conventions, and we should really
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* preserve the return code for our user to be able to
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* retry probing later.
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*/
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if (IS_ERR(desc) && PTR_ERR(desc) == -EPROBE_DEFER)
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return desc;
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if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT))
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break;
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}
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/* Special handling for SPI GPIOs if used */
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if (IS_ERR(desc))
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desc = of_find_spi_gpio(dev, con_id, &of_flags);
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/* Special handling for regulator GPIOs if used */
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if (IS_ERR(desc) && PTR_ERR(desc) != -EPROBE_DEFER)
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desc = of_find_regulator_gpio(dev, con_id, &of_flags);
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if (IS_ERR(desc))
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return desc;
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if (of_flags & OF_GPIO_ACTIVE_LOW)
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*flags |= GPIO_ACTIVE_LOW;
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if (of_flags & OF_GPIO_SINGLE_ENDED) {
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if (of_flags & OF_GPIO_OPEN_DRAIN)
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*flags |= GPIO_OPEN_DRAIN;
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else
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*flags |= GPIO_OPEN_SOURCE;
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}
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if (of_flags & OF_GPIO_TRANSITORY)
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*flags |= GPIO_TRANSITORY;
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if (of_flags & OF_GPIO_PULL_UP)
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*flags |= GPIO_PULL_UP;
|
|
if (of_flags & OF_GPIO_PULL_DOWN)
|
|
*flags |= GPIO_PULL_DOWN;
|
|
|
|
return desc;
|
|
}
|
|
|
|
/**
|
|
* of_parse_own_gpio() - Get a GPIO hog descriptor, names and flags for GPIO API
|
|
* @np: device node to get GPIO from
|
|
* @chip: GPIO chip whose hog is parsed
|
|
* @idx: Index of the GPIO to parse
|
|
* @name: GPIO line name
|
|
* @lflags: gpio_lookup_flags - returned from of_find_gpio() or
|
|
* of_parse_own_gpio()
|
|
* @dflags: gpiod_flags - optional GPIO initialization flags
|
|
*
|
|
* Returns GPIO descriptor to use with Linux GPIO API, or one of the errno
|
|
* value on the error condition.
|
|
*/
|
|
static struct gpio_desc *of_parse_own_gpio(struct device_node *np,
|
|
struct gpio_chip *chip,
|
|
unsigned int idx, const char **name,
|
|
enum gpio_lookup_flags *lflags,
|
|
enum gpiod_flags *dflags)
|
|
{
|
|
struct device_node *chip_np;
|
|
enum of_gpio_flags xlate_flags;
|
|
struct of_phandle_args gpiospec;
|
|
struct gpio_desc *desc;
|
|
unsigned int i;
|
|
u32 tmp;
|
|
int ret;
|
|
|
|
chip_np = chip->of_node;
|
|
if (!chip_np)
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
xlate_flags = 0;
|
|
*lflags = 0;
|
|
*dflags = 0;
|
|
|
|
ret = of_property_read_u32(chip_np, "#gpio-cells", &tmp);
|
|
if (ret)
|
|
return ERR_PTR(ret);
|
|
|
|
gpiospec.np = chip_np;
|
|
gpiospec.args_count = tmp;
|
|
|
|
for (i = 0; i < tmp; i++) {
|
|
ret = of_property_read_u32_index(np, "gpios", idx * tmp + i,
|
|
&gpiospec.args[i]);
|
|
if (ret)
|
|
return ERR_PTR(ret);
|
|
}
|
|
|
|
desc = of_xlate_and_get_gpiod_flags(chip, &gpiospec, &xlate_flags);
|
|
if (IS_ERR(desc))
|
|
return desc;
|
|
|
|
if (xlate_flags & OF_GPIO_ACTIVE_LOW)
|
|
*lflags |= GPIO_ACTIVE_LOW;
|
|
if (xlate_flags & OF_GPIO_TRANSITORY)
|
|
*lflags |= GPIO_TRANSITORY;
|
|
|
|
if (of_property_read_bool(np, "input"))
|
|
*dflags |= GPIOD_IN;
|
|
else if (of_property_read_bool(np, "output-low"))
|
|
*dflags |= GPIOD_OUT_LOW;
|
|
else if (of_property_read_bool(np, "output-high"))
|
|
*dflags |= GPIOD_OUT_HIGH;
|
|
else {
|
|
pr_warn("GPIO line %d (%pOFn): no hogging state specified, bailing out\n",
|
|
desc_to_gpio(desc), np);
|
|
return ERR_PTR(-EINVAL);
|
|
}
|
|
|
|
if (name && of_property_read_string(np, "line-name", name))
|
|
*name = np->name;
|
|
|
|
return desc;
|
|
}
|
|
|
|
/**
|
|
* of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions
|
|
* @chip: gpio chip to act on
|
|
*
|
|
* This is only used by of_gpiochip_add to request/set GPIO initial
|
|
* configuration.
|
|
* It returns error if it fails otherwise 0 on success.
|
|
*/
|
|
static int of_gpiochip_scan_gpios(struct gpio_chip *chip)
|
|
{
|
|
struct gpio_desc *desc = NULL;
|
|
struct device_node *np;
|
|
const char *name;
|
|
enum gpio_lookup_flags lflags;
|
|
enum gpiod_flags dflags;
|
|
unsigned int i;
|
|
int ret;
|
|
|
|
for_each_available_child_of_node(chip->of_node, np) {
|
|
if (!of_property_read_bool(np, "gpio-hog"))
|
|
continue;
|
|
|
|
for (i = 0;; i++) {
|
|
desc = of_parse_own_gpio(np, chip, i, &name, &lflags,
|
|
&dflags);
|
|
if (IS_ERR(desc))
|
|
break;
|
|
|
|
ret = gpiod_hog(desc, name, lflags, dflags);
|
|
if (ret < 0) {
|
|
of_node_put(np);
|
|
return ret;
|
|
}
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* of_gpio_simple_xlate - translate gpiospec to the GPIO number and flags
|
|
* @gc: pointer to the gpio_chip structure
|
|
* @gpiospec: GPIO specifier as found in the device tree
|
|
* @flags: a flags pointer to fill in
|
|
*
|
|
* This is simple translation function, suitable for the most 1:1 mapped
|
|
* GPIO chips. This function performs only one sanity check: whether GPIO
|
|
* is less than ngpios (that is specified in the gpio_chip).
|
|
*/
|
|
int of_gpio_simple_xlate(struct gpio_chip *gc,
|
|
const struct of_phandle_args *gpiospec, u32 *flags)
|
|
{
|
|
/*
|
|
* We're discouraging gpio_cells < 2, since that way you'll have to
|
|
* write your own xlate function (that will have to retrieve the GPIO
|
|
* number and the flags from a single gpio cell -- this is possible,
|
|
* but not recommended).
|
|
*/
|
|
if (gc->of_gpio_n_cells < 2) {
|
|
WARN_ON(1);
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells))
|
|
return -EINVAL;
|
|
|
|
if (gpiospec->args[0] >= gc->ngpio)
|
|
return -EINVAL;
|
|
|
|
if (flags)
|
|
*flags = gpiospec->args[1];
|
|
|
|
return gpiospec->args[0];
|
|
}
|
|
EXPORT_SYMBOL(of_gpio_simple_xlate);
|
|
|
|
/**
|
|
* of_mm_gpiochip_add_data - Add memory mapped GPIO chip (bank)
|
|
* @np: device node of the GPIO chip
|
|
* @mm_gc: pointer to the of_mm_gpio_chip allocated structure
|
|
* @data: driver data to store in the struct gpio_chip
|
|
*
|
|
* To use this function you should allocate and fill mm_gc with:
|
|
*
|
|
* 1) In the gpio_chip structure:
|
|
* - all the callbacks
|
|
* - of_gpio_n_cells
|
|
* - of_xlate callback (optional)
|
|
*
|
|
* 3) In the of_mm_gpio_chip structure:
|
|
* - save_regs callback (optional)
|
|
*
|
|
* If succeeded, this function will map bank's memory and will
|
|
* do all necessary work for you. Then you'll able to use .regs
|
|
* to manage GPIOs from the callbacks.
|
|
*/
|
|
int of_mm_gpiochip_add_data(struct device_node *np,
|
|
struct of_mm_gpio_chip *mm_gc,
|
|
void *data)
|
|
{
|
|
int ret = -ENOMEM;
|
|
struct gpio_chip *gc = &mm_gc->gc;
|
|
|
|
gc->label = kasprintf(GFP_KERNEL, "%pOF", np);
|
|
if (!gc->label)
|
|
goto err0;
|
|
|
|
mm_gc->regs = of_iomap(np, 0);
|
|
if (!mm_gc->regs)
|
|
goto err1;
|
|
|
|
gc->base = -1;
|
|
|
|
if (mm_gc->save_regs)
|
|
mm_gc->save_regs(mm_gc);
|
|
|
|
mm_gc->gc.of_node = np;
|
|
|
|
ret = gpiochip_add_data(gc, data);
|
|
if (ret)
|
|
goto err2;
|
|
|
|
return 0;
|
|
err2:
|
|
iounmap(mm_gc->regs);
|
|
err1:
|
|
kfree(gc->label);
|
|
err0:
|
|
pr_err("%pOF: GPIO chip registration failed with status %d\n", np, ret);
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL(of_mm_gpiochip_add_data);
|
|
|
|
/**
|
|
* of_mm_gpiochip_remove - Remove memory mapped GPIO chip (bank)
|
|
* @mm_gc: pointer to the of_mm_gpio_chip allocated structure
|
|
*/
|
|
void of_mm_gpiochip_remove(struct of_mm_gpio_chip *mm_gc)
|
|
{
|
|
struct gpio_chip *gc = &mm_gc->gc;
|
|
|
|
if (!mm_gc)
|
|
return;
|
|
|
|
gpiochip_remove(gc);
|
|
iounmap(mm_gc->regs);
|
|
kfree(gc->label);
|
|
}
|
|
EXPORT_SYMBOL(of_mm_gpiochip_remove);
|
|
|
|
static void of_gpiochip_init_valid_mask(struct gpio_chip *chip)
|
|
{
|
|
int len, i;
|
|
u32 start, count;
|
|
struct device_node *np = chip->of_node;
|
|
|
|
len = of_property_count_u32_elems(np, "gpio-reserved-ranges");
|
|
if (len < 0 || len % 2 != 0)
|
|
return;
|
|
|
|
for (i = 0; i < len; i += 2) {
|
|
of_property_read_u32_index(np, "gpio-reserved-ranges",
|
|
i, &start);
|
|
of_property_read_u32_index(np, "gpio-reserved-ranges",
|
|
i + 1, &count);
|
|
if (start >= chip->ngpio || start + count >= chip->ngpio)
|
|
continue;
|
|
|
|
bitmap_clear(chip->valid_mask, start, count);
|
|
}
|
|
};
|
|
|
|
#ifdef CONFIG_PINCTRL
|
|
static int of_gpiochip_add_pin_range(struct gpio_chip *chip)
|
|
{
|
|
struct device_node *np = chip->of_node;
|
|
struct of_phandle_args pinspec;
|
|
struct pinctrl_dev *pctldev;
|
|
int index = 0, ret;
|
|
const char *name;
|
|
static const char group_names_propname[] = "gpio-ranges-group-names";
|
|
struct property *group_names;
|
|
|
|
if (!np)
|
|
return 0;
|
|
|
|
group_names = of_find_property(np, group_names_propname, NULL);
|
|
|
|
for (;; index++) {
|
|
ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3,
|
|
index, &pinspec);
|
|
if (ret)
|
|
break;
|
|
|
|
pctldev = of_pinctrl_get(pinspec.np);
|
|
of_node_put(pinspec.np);
|
|
if (!pctldev)
|
|
return -EPROBE_DEFER;
|
|
|
|
if (pinspec.args[2]) {
|
|
if (group_names) {
|
|
of_property_read_string_index(np,
|
|
group_names_propname,
|
|
index, &name);
|
|
if (strlen(name)) {
|
|
pr_err("%pOF: Group name of numeric GPIO ranges must be the empty string.\n",
|
|
np);
|
|
break;
|
|
}
|
|
}
|
|
/* npins != 0: linear range */
|
|
ret = gpiochip_add_pin_range(chip,
|
|
pinctrl_dev_get_devname(pctldev),
|
|
pinspec.args[0],
|
|
pinspec.args[1],
|
|
pinspec.args[2]);
|
|
if (ret)
|
|
return ret;
|
|
} else {
|
|
/* npins == 0: special range */
|
|
if (pinspec.args[1]) {
|
|
pr_err("%pOF: Illegal gpio-range format.\n",
|
|
np);
|
|
break;
|
|
}
|
|
|
|
if (!group_names) {
|
|
pr_err("%pOF: GPIO group range requested but no %s property.\n",
|
|
np, group_names_propname);
|
|
break;
|
|
}
|
|
|
|
ret = of_property_read_string_index(np,
|
|
group_names_propname,
|
|
index, &name);
|
|
if (ret)
|
|
break;
|
|
|
|
if (!strlen(name)) {
|
|
pr_err("%pOF: Group name of GPIO group range cannot be the empty string.\n",
|
|
np);
|
|
break;
|
|
}
|
|
|
|
ret = gpiochip_add_pingroup_range(chip, pctldev,
|
|
pinspec.args[0], name);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#else
|
|
static int of_gpiochip_add_pin_range(struct gpio_chip *chip) { return 0; }
|
|
#endif
|
|
|
|
int of_gpiochip_add(struct gpio_chip *chip)
|
|
{
|
|
int status;
|
|
|
|
if (!chip->of_node)
|
|
return 0;
|
|
|
|
if (!chip->of_xlate) {
|
|
chip->of_gpio_n_cells = 2;
|
|
chip->of_xlate = of_gpio_simple_xlate;
|
|
}
|
|
|
|
if (chip->of_gpio_n_cells > MAX_PHANDLE_ARGS)
|
|
return -EINVAL;
|
|
|
|
of_gpiochip_init_valid_mask(chip);
|
|
|
|
status = of_gpiochip_add_pin_range(chip);
|
|
if (status)
|
|
return status;
|
|
|
|
/* If the chip defines names itself, these take precedence */
|
|
if (!chip->names)
|
|
devprop_gpiochip_set_names(chip,
|
|
of_fwnode_handle(chip->of_node));
|
|
|
|
of_node_get(chip->of_node);
|
|
|
|
return of_gpiochip_scan_gpios(chip);
|
|
}
|
|
|
|
void of_gpiochip_remove(struct gpio_chip *chip)
|
|
{
|
|
gpiochip_remove_pin_ranges(chip);
|
|
of_node_put(chip->of_node);
|
|
}
|