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c3d12a1092
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230304133028.2135435-25-u.kleine-koenig@pengutronix.de Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
385 lines
9.6 KiB
C
385 lines
9.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* PIC32 RTC driver
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*
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* Joshua Henderson <joshua.henderson@microchip.com>
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* Copyright (C) 2016 Microchip Technology Inc. All rights reserved.
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*
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/rtc.h>
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#include <linux/bcd.h>
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#include <asm/mach-pic32/pic32.h>
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#define PIC32_RTCCON 0x00
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#define PIC32_RTCCON_ON BIT(15)
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#define PIC32_RTCCON_SIDL BIT(13)
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#define PIC32_RTCCON_RTCCLKSEL (3 << 9)
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#define PIC32_RTCCON_RTCCLKON BIT(6)
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#define PIC32_RTCCON_RTCWREN BIT(3)
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#define PIC32_RTCCON_RTCSYNC BIT(2)
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#define PIC32_RTCCON_HALFSEC BIT(1)
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#define PIC32_RTCCON_RTCOE BIT(0)
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#define PIC32_RTCALRM 0x10
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#define PIC32_RTCALRM_ALRMEN BIT(15)
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#define PIC32_RTCALRM_CHIME BIT(14)
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#define PIC32_RTCALRM_PIV BIT(13)
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#define PIC32_RTCALRM_ALARMSYNC BIT(12)
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#define PIC32_RTCALRM_AMASK 0x0F00
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#define PIC32_RTCALRM_ARPT 0xFF
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#define PIC32_RTCHOUR 0x23
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#define PIC32_RTCMIN 0x22
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#define PIC32_RTCSEC 0x21
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#define PIC32_RTCYEAR 0x33
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#define PIC32_RTCMON 0x32
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#define PIC32_RTCDAY 0x31
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#define PIC32_ALRMTIME 0x40
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#define PIC32_ALRMDATE 0x50
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#define PIC32_ALRMHOUR 0x43
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#define PIC32_ALRMMIN 0x42
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#define PIC32_ALRMSEC 0x41
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#define PIC32_ALRMYEAR 0x53
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#define PIC32_ALRMMON 0x52
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#define PIC32_ALRMDAY 0x51
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struct pic32_rtc_dev {
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struct rtc_device *rtc;
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void __iomem *reg_base;
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struct clk *clk;
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spinlock_t alarm_lock;
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int alarm_irq;
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bool alarm_clk_enabled;
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};
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static void pic32_rtc_alarm_clk_enable(struct pic32_rtc_dev *pdata,
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bool enable)
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{
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unsigned long flags;
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spin_lock_irqsave(&pdata->alarm_lock, flags);
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if (enable) {
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if (!pdata->alarm_clk_enabled) {
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clk_enable(pdata->clk);
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pdata->alarm_clk_enabled = true;
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}
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} else {
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if (pdata->alarm_clk_enabled) {
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clk_disable(pdata->clk);
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pdata->alarm_clk_enabled = false;
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}
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}
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spin_unlock_irqrestore(&pdata->alarm_lock, flags);
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}
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static irqreturn_t pic32_rtc_alarmirq(int irq, void *id)
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{
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struct pic32_rtc_dev *pdata = (struct pic32_rtc_dev *)id;
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clk_enable(pdata->clk);
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rtc_update_irq(pdata->rtc, 1, RTC_AF | RTC_IRQF);
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clk_disable(pdata->clk);
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pic32_rtc_alarm_clk_enable(pdata, false);
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return IRQ_HANDLED;
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}
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static int pic32_rtc_setaie(struct device *dev, unsigned int enabled)
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{
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struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
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void __iomem *base = pdata->reg_base;
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clk_enable(pdata->clk);
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writel(PIC32_RTCALRM_ALRMEN,
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base + (enabled ? PIC32_SET(PIC32_RTCALRM) :
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PIC32_CLR(PIC32_RTCALRM)));
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clk_disable(pdata->clk);
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pic32_rtc_alarm_clk_enable(pdata, enabled);
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return 0;
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}
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static int pic32_rtc_setfreq(struct device *dev, int freq)
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{
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struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
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void __iomem *base = pdata->reg_base;
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clk_enable(pdata->clk);
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writel(PIC32_RTCALRM_AMASK, base + PIC32_CLR(PIC32_RTCALRM));
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writel(freq << 8, base + PIC32_SET(PIC32_RTCALRM));
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writel(PIC32_RTCALRM_CHIME, base + PIC32_SET(PIC32_RTCALRM));
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clk_disable(pdata->clk);
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return 0;
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}
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static int pic32_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
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{
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struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
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void __iomem *base = pdata->reg_base;
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unsigned int tries = 0;
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clk_enable(pdata->clk);
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do {
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rtc_tm->tm_hour = readb(base + PIC32_RTCHOUR);
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rtc_tm->tm_min = readb(base + PIC32_RTCMIN);
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rtc_tm->tm_mon = readb(base + PIC32_RTCMON);
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rtc_tm->tm_mday = readb(base + PIC32_RTCDAY);
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rtc_tm->tm_year = readb(base + PIC32_RTCYEAR);
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rtc_tm->tm_sec = readb(base + PIC32_RTCSEC);
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/*
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* The only way to work out whether the system was mid-update
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* when we read it is to check the second counter, and if it
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* is zero, then we re-try the entire read.
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*/
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tries += 1;
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} while (rtc_tm->tm_sec == 0 && tries < 2);
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rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
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rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
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rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
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rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
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rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon) - 1;
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rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
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rtc_tm->tm_year += 100;
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dev_dbg(dev, "read time %ptR\n", rtc_tm);
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clk_disable(pdata->clk);
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return 0;
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}
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static int pic32_rtc_settime(struct device *dev, struct rtc_time *tm)
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{
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struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
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void __iomem *base = pdata->reg_base;
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dev_dbg(dev, "set time %ptR\n", tm);
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clk_enable(pdata->clk);
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writeb(bin2bcd(tm->tm_sec), base + PIC32_RTCSEC);
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writeb(bin2bcd(tm->tm_min), base + PIC32_RTCMIN);
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writeb(bin2bcd(tm->tm_hour), base + PIC32_RTCHOUR);
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writeb(bin2bcd(tm->tm_mday), base + PIC32_RTCDAY);
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writeb(bin2bcd(tm->tm_mon + 1), base + PIC32_RTCMON);
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writeb(bin2bcd(tm->tm_year - 100), base + PIC32_RTCYEAR);
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clk_disable(pdata->clk);
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return 0;
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}
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static int pic32_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
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struct rtc_time *alm_tm = &alrm->time;
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void __iomem *base = pdata->reg_base;
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unsigned int alm_en;
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clk_enable(pdata->clk);
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alm_tm->tm_sec = readb(base + PIC32_ALRMSEC);
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alm_tm->tm_min = readb(base + PIC32_ALRMMIN);
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alm_tm->tm_hour = readb(base + PIC32_ALRMHOUR);
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alm_tm->tm_mon = readb(base + PIC32_ALRMMON);
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alm_tm->tm_mday = readb(base + PIC32_ALRMDAY);
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alm_tm->tm_year = readb(base + PIC32_ALRMYEAR);
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alm_en = readb(base + PIC32_RTCALRM);
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alrm->enabled = (alm_en & PIC32_RTCALRM_ALRMEN) ? 1 : 0;
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dev_dbg(dev, "getalarm: %d, %ptR\n", alm_en, alm_tm);
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alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
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alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
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alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
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alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
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alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon) - 1;
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alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
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clk_disable(pdata->clk);
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return 0;
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}
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static int pic32_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
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struct rtc_time *tm = &alrm->time;
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void __iomem *base = pdata->reg_base;
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clk_enable(pdata->clk);
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dev_dbg(dev, "setalarm: %d, %ptR\n", alrm->enabled, tm);
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writel(0x00, base + PIC32_ALRMTIME);
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writel(0x00, base + PIC32_ALRMDATE);
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pic32_rtc_setaie(dev, alrm->enabled);
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clk_disable(pdata->clk);
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return 0;
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}
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static int pic32_rtc_proc(struct device *dev, struct seq_file *seq)
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{
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struct pic32_rtc_dev *pdata = dev_get_drvdata(dev);
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void __iomem *base = pdata->reg_base;
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unsigned int repeat;
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clk_enable(pdata->clk);
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repeat = readw(base + PIC32_RTCALRM);
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repeat &= PIC32_RTCALRM_ARPT;
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seq_printf(seq, "periodic_IRQ\t: %s\n", repeat ? "yes" : "no");
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clk_disable(pdata->clk);
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return 0;
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}
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static const struct rtc_class_ops pic32_rtcops = {
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.read_time = pic32_rtc_gettime,
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.set_time = pic32_rtc_settime,
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.read_alarm = pic32_rtc_getalarm,
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.set_alarm = pic32_rtc_setalarm,
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.proc = pic32_rtc_proc,
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.alarm_irq_enable = pic32_rtc_setaie,
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};
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static void pic32_rtc_enable(struct pic32_rtc_dev *pdata, int en)
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{
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void __iomem *base = pdata->reg_base;
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if (!base)
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return;
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clk_enable(pdata->clk);
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if (!en) {
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writel(PIC32_RTCCON_ON, base + PIC32_CLR(PIC32_RTCCON));
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} else {
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pic32_syskey_unlock();
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writel(PIC32_RTCCON_RTCWREN, base + PIC32_SET(PIC32_RTCCON));
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writel(3 << 9, base + PIC32_CLR(PIC32_RTCCON));
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if (!(readl(base + PIC32_RTCCON) & PIC32_RTCCON_ON))
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writel(PIC32_RTCCON_ON, base + PIC32_SET(PIC32_RTCCON));
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}
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clk_disable(pdata->clk);
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}
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static void pic32_rtc_remove(struct platform_device *pdev)
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{
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struct pic32_rtc_dev *pdata = platform_get_drvdata(pdev);
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pic32_rtc_setaie(&pdev->dev, 0);
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clk_unprepare(pdata->clk);
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pdata->clk = NULL;
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}
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static int pic32_rtc_probe(struct platform_device *pdev)
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{
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struct pic32_rtc_dev *pdata;
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int ret;
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pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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platform_set_drvdata(pdev, pdata);
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pdata->alarm_irq = platform_get_irq(pdev, 0);
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if (pdata->alarm_irq < 0)
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return pdata->alarm_irq;
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pdata->reg_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(pdata->reg_base))
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return PTR_ERR(pdata->reg_base);
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pdata->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(pdata->clk)) {
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dev_err(&pdev->dev, "failed to find rtc clock source\n");
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ret = PTR_ERR(pdata->clk);
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pdata->clk = NULL;
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return ret;
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}
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spin_lock_init(&pdata->alarm_lock);
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pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
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if (IS_ERR(pdata->rtc))
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return PTR_ERR(pdata->rtc);
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clk_prepare_enable(pdata->clk);
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pic32_rtc_enable(pdata, 1);
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device_init_wakeup(&pdev->dev, 1);
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pdata->rtc->ops = &pic32_rtcops;
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pdata->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
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pdata->rtc->range_max = RTC_TIMESTAMP_END_2099;
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ret = devm_rtc_register_device(pdata->rtc);
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if (ret)
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goto err_nortc;
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pdata->rtc->max_user_freq = 128;
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pic32_rtc_setfreq(&pdev->dev, 1);
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ret = devm_request_irq(&pdev->dev, pdata->alarm_irq,
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pic32_rtc_alarmirq, 0,
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dev_name(&pdev->dev), pdata);
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if (ret) {
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dev_err(&pdev->dev,
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"IRQ %d error %d\n", pdata->alarm_irq, ret);
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goto err_nortc;
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}
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clk_disable(pdata->clk);
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return 0;
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err_nortc:
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pic32_rtc_enable(pdata, 0);
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clk_disable_unprepare(pdata->clk);
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return ret;
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}
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static const struct of_device_id pic32_rtc_dt_ids[] = {
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{ .compatible = "microchip,pic32mzda-rtc" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, pic32_rtc_dt_ids);
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static struct platform_driver pic32_rtc_driver = {
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.probe = pic32_rtc_probe,
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.remove_new = pic32_rtc_remove,
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.driver = {
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.name = "pic32-rtc",
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.of_match_table = of_match_ptr(pic32_rtc_dt_ids),
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},
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};
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module_platform_driver(pic32_rtc_driver);
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MODULE_DESCRIPTION("Microchip PIC32 RTC Driver");
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MODULE_AUTHOR("Joshua Henderson <joshua.henderson@microchip.com>");
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MODULE_LICENSE("GPL");
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