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9845063710
Sometimes we don't know memory store operations happen on exactly which memory (or cache) level, the memory level flag is set to PERF_MEM_LVL_NA in this case; a practical example is Arm SPE AUX trace sets this flag for all store operations due to absent info for cache level. This patch is to add a new item "st_na" in structure c2c_stats to add statistics for store operations with no available cache level. Signed-off-by: Leo Yan <leo.yan@linaro.org> Acked-by: Jiri Olsa <jolsa@kernel.org> Cc: Adam Li <adamli@amperemail.onmicrosoft.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ali Saidi <alisaidi@amazon.com> Cc: Alyssa Ross <hi@alyssa.is> Cc: German Gomez <german.gomez@arm.com> Cc: Ian Rogers <irogers@google.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Joe Mario <jmario@redhat.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Li Huafei <lihuafei1@huawei.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: https://lore.kernel.org/r/20220518055729.1869566-2-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
663 lines
14 KiB
C
663 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <stddef.h>
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#include <stdlib.h>
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#include <string.h>
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#include <errno.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <unistd.h>
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#include <api/fs/fs.h>
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#include <linux/kernel.h>
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#include "map_symbol.h"
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#include "mem-events.h"
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#include "debug.h"
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#include "symbol.h"
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#include "pmu.h"
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#include "pmu-hybrid.h"
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unsigned int perf_mem_events__loads_ldlat = 30;
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#define E(t, n, s) { .tag = t, .name = n, .sysfs_name = s }
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static struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] = {
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E("ldlat-loads", "cpu/mem-loads,ldlat=%u/P", "cpu/events/mem-loads"),
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E("ldlat-stores", "cpu/mem-stores/P", "cpu/events/mem-stores"),
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E(NULL, NULL, NULL),
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};
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#undef E
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static char mem_loads_name[100];
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static bool mem_loads_name__init;
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struct perf_mem_event * __weak perf_mem_events__ptr(int i)
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{
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if (i >= PERF_MEM_EVENTS__MAX)
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return NULL;
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return &perf_mem_events[i];
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}
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char * __weak perf_mem_events__name(int i, char *pmu_name __maybe_unused)
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{
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struct perf_mem_event *e = perf_mem_events__ptr(i);
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if (!e)
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return NULL;
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if (i == PERF_MEM_EVENTS__LOAD) {
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if (!mem_loads_name__init) {
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mem_loads_name__init = true;
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scnprintf(mem_loads_name, sizeof(mem_loads_name),
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e->name, perf_mem_events__loads_ldlat);
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}
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return mem_loads_name;
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}
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return (char *)e->name;
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}
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__weak bool is_mem_loads_aux_event(struct evsel *leader __maybe_unused)
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{
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return false;
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}
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int perf_mem_events__parse(const char *str)
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{
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char *tok, *saveptr = NULL;
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bool found = false;
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char *buf;
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int j;
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/* We need buffer that we know we can write to. */
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buf = malloc(strlen(str) + 1);
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if (!buf)
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return -ENOMEM;
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strcpy(buf, str);
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tok = strtok_r((char *)buf, ",", &saveptr);
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while (tok) {
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for (j = 0; j < PERF_MEM_EVENTS__MAX; j++) {
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struct perf_mem_event *e = perf_mem_events__ptr(j);
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if (!e->tag)
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continue;
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if (strstr(e->tag, tok))
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e->record = found = true;
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}
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tok = strtok_r(NULL, ",", &saveptr);
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}
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free(buf);
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if (found)
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return 0;
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pr_err("failed: event '%s' not found, use '-e list' to get list of available events\n", str);
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return -1;
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}
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static bool perf_mem_event__supported(const char *mnt, char *sysfs_name)
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{
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char path[PATH_MAX];
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struct stat st;
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scnprintf(path, PATH_MAX, "%s/devices/%s", mnt, sysfs_name);
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return !stat(path, &st);
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}
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int perf_mem_events__init(void)
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{
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const char *mnt = sysfs__mount();
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bool found = false;
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int j;
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if (!mnt)
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return -ENOENT;
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for (j = 0; j < PERF_MEM_EVENTS__MAX; j++) {
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struct perf_mem_event *e = perf_mem_events__ptr(j);
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struct perf_pmu *pmu;
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char sysfs_name[100];
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/*
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* If the event entry isn't valid, skip initialization
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* and "e->supported" will keep false.
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*/
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if (!e->tag)
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continue;
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if (!perf_pmu__has_hybrid()) {
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scnprintf(sysfs_name, sizeof(sysfs_name),
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e->sysfs_name, "cpu");
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e->supported = perf_mem_event__supported(mnt, sysfs_name);
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} else {
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perf_pmu__for_each_hybrid_pmu(pmu) {
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scnprintf(sysfs_name, sizeof(sysfs_name),
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e->sysfs_name, pmu->name);
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e->supported |= perf_mem_event__supported(mnt, sysfs_name);
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}
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}
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if (e->supported)
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found = true;
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}
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return found ? 0 : -ENOENT;
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}
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void perf_mem_events__list(void)
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{
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int j;
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for (j = 0; j < PERF_MEM_EVENTS__MAX; j++) {
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struct perf_mem_event *e = perf_mem_events__ptr(j);
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fprintf(stderr, "%-13s%-*s%s\n",
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e->tag ?: "",
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verbose > 0 ? 25 : 0,
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verbose > 0 ? perf_mem_events__name(j, NULL) : "",
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e->supported ? ": available" : "");
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}
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}
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static void perf_mem_events__print_unsupport_hybrid(struct perf_mem_event *e,
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int idx)
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{
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const char *mnt = sysfs__mount();
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char sysfs_name[100];
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struct perf_pmu *pmu;
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perf_pmu__for_each_hybrid_pmu(pmu) {
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scnprintf(sysfs_name, sizeof(sysfs_name), e->sysfs_name,
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pmu->name);
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if (!perf_mem_event__supported(mnt, sysfs_name)) {
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pr_err("failed: event '%s' not supported\n",
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perf_mem_events__name(idx, pmu->name));
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}
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}
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}
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int perf_mem_events__record_args(const char **rec_argv, int *argv_nr,
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char **rec_tmp, int *tmp_nr)
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{
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int i = *argv_nr, k = 0;
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struct perf_mem_event *e;
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struct perf_pmu *pmu;
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char *s;
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for (int j = 0; j < PERF_MEM_EVENTS__MAX; j++) {
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e = perf_mem_events__ptr(j);
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if (!e->record)
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continue;
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if (!perf_pmu__has_hybrid()) {
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if (!e->supported) {
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pr_err("failed: event '%s' not supported\n",
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perf_mem_events__name(j, NULL));
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return -1;
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}
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rec_argv[i++] = "-e";
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rec_argv[i++] = perf_mem_events__name(j, NULL);
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} else {
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if (!e->supported) {
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perf_mem_events__print_unsupport_hybrid(e, j);
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return -1;
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}
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perf_pmu__for_each_hybrid_pmu(pmu) {
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rec_argv[i++] = "-e";
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s = perf_mem_events__name(j, pmu->name);
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if (s) {
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s = strdup(s);
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if (!s)
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return -1;
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rec_argv[i++] = s;
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rec_tmp[k++] = s;
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}
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}
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}
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}
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*argv_nr = i;
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*tmp_nr = k;
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return 0;
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}
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static const char * const tlb_access[] = {
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"N/A",
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"HIT",
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"MISS",
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"L1",
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"L2",
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"Walker",
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"Fault",
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};
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int perf_mem__tlb_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
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{
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size_t l = 0, i;
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u64 m = PERF_MEM_TLB_NA;
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u64 hit, miss;
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sz -= 1; /* -1 for null termination */
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out[0] = '\0';
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if (mem_info)
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m = mem_info->data_src.mem_dtlb;
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hit = m & PERF_MEM_TLB_HIT;
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miss = m & PERF_MEM_TLB_MISS;
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/* already taken care of */
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m &= ~(PERF_MEM_TLB_HIT|PERF_MEM_TLB_MISS);
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for (i = 0; m && i < ARRAY_SIZE(tlb_access); i++, m >>= 1) {
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if (!(m & 0x1))
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continue;
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if (l) {
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strcat(out, " or ");
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l += 4;
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}
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l += scnprintf(out + l, sz - l, tlb_access[i]);
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}
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if (*out == '\0')
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l += scnprintf(out, sz - l, "N/A");
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if (hit)
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l += scnprintf(out + l, sz - l, " hit");
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if (miss)
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l += scnprintf(out + l, sz - l, " miss");
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return l;
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}
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static const char * const mem_lvl[] = {
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"N/A",
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"HIT",
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"MISS",
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"L1",
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"LFB",
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"L2",
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"L3",
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"Local RAM",
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"Remote RAM (1 hop)",
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"Remote RAM (2 hops)",
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"Remote Cache (1 hop)",
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"Remote Cache (2 hops)",
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"I/O",
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"Uncached",
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};
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static const char * const mem_lvlnum[] = {
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[PERF_MEM_LVLNUM_ANY_CACHE] = "Any cache",
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[PERF_MEM_LVLNUM_LFB] = "LFB",
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[PERF_MEM_LVLNUM_RAM] = "RAM",
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[PERF_MEM_LVLNUM_PMEM] = "PMEM",
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[PERF_MEM_LVLNUM_NA] = "N/A",
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};
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static const char * const mem_hops[] = {
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"N/A",
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/*
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* While printing, 'Remote' will be added to represent
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* 'Remote core, same node' accesses as remote field need
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* to be set with mem_hops field.
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*/
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"core, same node",
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"node, same socket",
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"socket, same board",
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"board",
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};
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static int perf_mem__op_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
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{
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u64 op = PERF_MEM_LOCK_NA;
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int l;
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if (mem_info)
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op = mem_info->data_src.mem_op;
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if (op & PERF_MEM_OP_NA)
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l = scnprintf(out, sz, "N/A");
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else if (op & PERF_MEM_OP_LOAD)
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l = scnprintf(out, sz, "LOAD");
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else if (op & PERF_MEM_OP_STORE)
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l = scnprintf(out, sz, "STORE");
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else if (op & PERF_MEM_OP_PFETCH)
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l = scnprintf(out, sz, "PFETCH");
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else if (op & PERF_MEM_OP_EXEC)
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l = scnprintf(out, sz, "EXEC");
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else
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l = scnprintf(out, sz, "No");
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return l;
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}
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int perf_mem__lvl_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
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{
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size_t i, l = 0;
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u64 m = PERF_MEM_LVL_NA;
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u64 hit, miss;
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int printed = 0;
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if (mem_info)
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m = mem_info->data_src.mem_lvl;
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sz -= 1; /* -1 for null termination */
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out[0] = '\0';
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hit = m & PERF_MEM_LVL_HIT;
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miss = m & PERF_MEM_LVL_MISS;
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/* already taken care of */
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m &= ~(PERF_MEM_LVL_HIT|PERF_MEM_LVL_MISS);
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if (mem_info && mem_info->data_src.mem_remote) {
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strcat(out, "Remote ");
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l += 7;
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}
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/*
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* Incase mem_hops field is set, we can skip printing data source via
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* PERF_MEM_LVL namespace.
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*/
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if (mem_info && mem_info->data_src.mem_hops) {
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l += scnprintf(out + l, sz - l, "%s ", mem_hops[mem_info->data_src.mem_hops]);
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} else {
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for (i = 0; m && i < ARRAY_SIZE(mem_lvl); i++, m >>= 1) {
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if (!(m & 0x1))
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continue;
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if (printed++) {
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strcat(out, " or ");
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l += 4;
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}
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l += scnprintf(out + l, sz - l, mem_lvl[i]);
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}
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}
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if (mem_info && mem_info->data_src.mem_lvl_num) {
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int lvl = mem_info->data_src.mem_lvl_num;
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if (printed++) {
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strcat(out, " or ");
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l += 4;
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}
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if (mem_lvlnum[lvl])
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l += scnprintf(out + l, sz - l, mem_lvlnum[lvl]);
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else
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l += scnprintf(out + l, sz - l, "L%d", lvl);
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}
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if (l == 0)
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l += scnprintf(out + l, sz - l, "N/A");
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if (hit)
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l += scnprintf(out + l, sz - l, " hit");
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if (miss)
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l += scnprintf(out + l, sz - l, " miss");
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return l;
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}
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static const char * const snoop_access[] = {
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"N/A",
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"None",
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"Hit",
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"Miss",
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"HitM",
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};
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int perf_mem__snp_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
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{
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size_t i, l = 0;
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u64 m = PERF_MEM_SNOOP_NA;
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sz -= 1; /* -1 for null termination */
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out[0] = '\0';
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if (mem_info)
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m = mem_info->data_src.mem_snoop;
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for (i = 0; m && i < ARRAY_SIZE(snoop_access); i++, m >>= 1) {
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if (!(m & 0x1))
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continue;
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if (l) {
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strcat(out, " or ");
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l += 4;
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}
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l += scnprintf(out + l, sz - l, snoop_access[i]);
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}
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if (mem_info &&
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(mem_info->data_src.mem_snoopx & PERF_MEM_SNOOPX_FWD)) {
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if (l) {
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strcat(out, " or ");
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l += 4;
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}
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l += scnprintf(out + l, sz - l, "Fwd");
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}
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if (*out == '\0')
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l += scnprintf(out, sz - l, "N/A");
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return l;
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}
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int perf_mem__lck_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
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{
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u64 mask = PERF_MEM_LOCK_NA;
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int l;
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if (mem_info)
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mask = mem_info->data_src.mem_lock;
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if (mask & PERF_MEM_LOCK_NA)
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l = scnprintf(out, sz, "N/A");
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else if (mask & PERF_MEM_LOCK_LOCKED)
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l = scnprintf(out, sz, "Yes");
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else
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l = scnprintf(out, sz, "No");
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return l;
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}
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int perf_mem__blk_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
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{
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size_t l = 0;
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u64 mask = PERF_MEM_BLK_NA;
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sz -= 1; /* -1 for null termination */
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out[0] = '\0';
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if (mem_info)
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mask = mem_info->data_src.mem_blk;
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if (!mask || (mask & PERF_MEM_BLK_NA)) {
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l += scnprintf(out + l, sz - l, " N/A");
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return l;
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}
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if (mask & PERF_MEM_BLK_DATA)
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l += scnprintf(out + l, sz - l, " Data");
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if (mask & PERF_MEM_BLK_ADDR)
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l += scnprintf(out + l, sz - l, " Addr");
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return l;
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}
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int perf_script__meminfo_scnprintf(char *out, size_t sz, struct mem_info *mem_info)
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{
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int i = 0;
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i += scnprintf(out, sz, "|OP ");
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i += perf_mem__op_scnprintf(out + i, sz - i, mem_info);
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i += scnprintf(out + i, sz - i, "|LVL ");
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i += perf_mem__lvl_scnprintf(out + i, sz, mem_info);
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i += scnprintf(out + i, sz - i, "|SNP ");
|
|
i += perf_mem__snp_scnprintf(out + i, sz - i, mem_info);
|
|
i += scnprintf(out + i, sz - i, "|TLB ");
|
|
i += perf_mem__tlb_scnprintf(out + i, sz - i, mem_info);
|
|
i += scnprintf(out + i, sz - i, "|LCK ");
|
|
i += perf_mem__lck_scnprintf(out + i, sz - i, mem_info);
|
|
i += scnprintf(out + i, sz - i, "|BLK ");
|
|
i += perf_mem__blk_scnprintf(out + i, sz - i, mem_info);
|
|
|
|
return i;
|
|
}
|
|
|
|
int c2c_decode_stats(struct c2c_stats *stats, struct mem_info *mi)
|
|
{
|
|
union perf_mem_data_src *data_src = &mi->data_src;
|
|
u64 daddr = mi->daddr.addr;
|
|
u64 op = data_src->mem_op;
|
|
u64 lvl = data_src->mem_lvl;
|
|
u64 snoop = data_src->mem_snoop;
|
|
u64 lock = data_src->mem_lock;
|
|
u64 blk = data_src->mem_blk;
|
|
/*
|
|
* Skylake might report unknown remote level via this
|
|
* bit, consider it when evaluating remote HITMs.
|
|
*
|
|
* Incase of power, remote field can also be used to denote cache
|
|
* accesses from the another core of same node. Hence, setting
|
|
* mrem only when HOPS is zero along with set remote field.
|
|
*/
|
|
bool mrem = (data_src->mem_remote && !data_src->mem_hops);
|
|
int err = 0;
|
|
|
|
#define HITM_INC(__f) \
|
|
do { \
|
|
stats->__f++; \
|
|
stats->tot_hitm++; \
|
|
} while (0)
|
|
|
|
#define P(a, b) PERF_MEM_##a##_##b
|
|
|
|
stats->nr_entries++;
|
|
|
|
if (lock & P(LOCK, LOCKED)) stats->locks++;
|
|
|
|
if (blk & P(BLK, DATA)) stats->blk_data++;
|
|
if (blk & P(BLK, ADDR)) stats->blk_addr++;
|
|
|
|
if (op & P(OP, LOAD)) {
|
|
/* load */
|
|
stats->load++;
|
|
|
|
if (!daddr) {
|
|
stats->ld_noadrs++;
|
|
return -1;
|
|
}
|
|
|
|
if (lvl & P(LVL, HIT)) {
|
|
if (lvl & P(LVL, UNC)) stats->ld_uncache++;
|
|
if (lvl & P(LVL, IO)) stats->ld_io++;
|
|
if (lvl & P(LVL, LFB)) stats->ld_fbhit++;
|
|
if (lvl & P(LVL, L1 )) stats->ld_l1hit++;
|
|
if (lvl & P(LVL, L2 )) stats->ld_l2hit++;
|
|
if (lvl & P(LVL, L3 )) {
|
|
if (snoop & P(SNOOP, HITM))
|
|
HITM_INC(lcl_hitm);
|
|
else
|
|
stats->ld_llchit++;
|
|
}
|
|
|
|
if (lvl & P(LVL, LOC_RAM)) {
|
|
stats->lcl_dram++;
|
|
if (snoop & P(SNOOP, HIT))
|
|
stats->ld_shared++;
|
|
else
|
|
stats->ld_excl++;
|
|
}
|
|
|
|
if ((lvl & P(LVL, REM_RAM1)) ||
|
|
(lvl & P(LVL, REM_RAM2)) ||
|
|
mrem) {
|
|
stats->rmt_dram++;
|
|
if (snoop & P(SNOOP, HIT))
|
|
stats->ld_shared++;
|
|
else
|
|
stats->ld_excl++;
|
|
}
|
|
}
|
|
|
|
if ((lvl & P(LVL, REM_CCE1)) ||
|
|
(lvl & P(LVL, REM_CCE2)) ||
|
|
mrem) {
|
|
if (snoop & P(SNOOP, HIT))
|
|
stats->rmt_hit++;
|
|
else if (snoop & P(SNOOP, HITM))
|
|
HITM_INC(rmt_hitm);
|
|
}
|
|
|
|
if ((lvl & P(LVL, MISS)))
|
|
stats->ld_miss++;
|
|
|
|
} else if (op & P(OP, STORE)) {
|
|
/* store */
|
|
stats->store++;
|
|
|
|
if (!daddr) {
|
|
stats->st_noadrs++;
|
|
return -1;
|
|
}
|
|
|
|
if (lvl & P(LVL, HIT)) {
|
|
if (lvl & P(LVL, UNC)) stats->st_uncache++;
|
|
if (lvl & P(LVL, L1 )) stats->st_l1hit++;
|
|
}
|
|
if (lvl & P(LVL, MISS))
|
|
if (lvl & P(LVL, L1)) stats->st_l1miss++;
|
|
if (lvl & P(LVL, NA))
|
|
stats->st_na++;
|
|
} else {
|
|
/* unparsable data_src? */
|
|
stats->noparse++;
|
|
return -1;
|
|
}
|
|
|
|
if (!mi->daddr.ms.map || !mi->iaddr.ms.map) {
|
|
stats->nomap++;
|
|
return -1;
|
|
}
|
|
|
|
#undef P
|
|
#undef HITM_INC
|
|
return err;
|
|
}
|
|
|
|
void c2c_add_stats(struct c2c_stats *stats, struct c2c_stats *add)
|
|
{
|
|
stats->nr_entries += add->nr_entries;
|
|
|
|
stats->locks += add->locks;
|
|
stats->store += add->store;
|
|
stats->st_uncache += add->st_uncache;
|
|
stats->st_noadrs += add->st_noadrs;
|
|
stats->st_l1hit += add->st_l1hit;
|
|
stats->st_l1miss += add->st_l1miss;
|
|
stats->st_na += add->st_na;
|
|
stats->load += add->load;
|
|
stats->ld_excl += add->ld_excl;
|
|
stats->ld_shared += add->ld_shared;
|
|
stats->ld_uncache += add->ld_uncache;
|
|
stats->ld_io += add->ld_io;
|
|
stats->ld_miss += add->ld_miss;
|
|
stats->ld_noadrs += add->ld_noadrs;
|
|
stats->ld_fbhit += add->ld_fbhit;
|
|
stats->ld_l1hit += add->ld_l1hit;
|
|
stats->ld_l2hit += add->ld_l2hit;
|
|
stats->ld_llchit += add->ld_llchit;
|
|
stats->lcl_hitm += add->lcl_hitm;
|
|
stats->rmt_hitm += add->rmt_hitm;
|
|
stats->tot_hitm += add->tot_hitm;
|
|
stats->rmt_hit += add->rmt_hit;
|
|
stats->lcl_dram += add->lcl_dram;
|
|
stats->rmt_dram += add->rmt_dram;
|
|
stats->blk_data += add->blk_data;
|
|
stats->blk_addr += add->blk_addr;
|
|
stats->nomap += add->nomap;
|
|
stats->noparse += add->noparse;
|
|
}
|