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e9803aac50
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
372 lines
8.9 KiB
C
372 lines
8.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Hisilicon's Hi6220 mailbox driver
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*
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* Copyright (c) 2015 HiSilicon Limited.
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* Copyright (c) 2015 Linaro Limited.
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*
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* Author: Leo Yan <leo.yan@linaro.org>
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kfifo.h>
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#include <linux/mailbox_controller.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define MBOX_CHAN_MAX 32
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#define MBOX_TX 0x1
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/* Mailbox message length: 8 words */
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#define MBOX_MSG_LEN 8
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/* Mailbox Registers */
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#define MBOX_OFF(m) (0x40 * (m))
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#define MBOX_MODE_REG(m) (MBOX_OFF(m) + 0x0)
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#define MBOX_DATA_REG(m) (MBOX_OFF(m) + 0x4)
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#define MBOX_STATE_MASK (0xF << 4)
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#define MBOX_STATE_IDLE (0x1 << 4)
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#define MBOX_STATE_TX (0x2 << 4)
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#define MBOX_STATE_RX (0x4 << 4)
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#define MBOX_STATE_ACK (0x8 << 4)
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#define MBOX_ACK_CONFIG_MASK (0x1 << 0)
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#define MBOX_ACK_AUTOMATIC (0x1 << 0)
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#define MBOX_ACK_IRQ (0x0 << 0)
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/* IPC registers */
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#define ACK_INT_RAW_REG(i) ((i) + 0x400)
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#define ACK_INT_MSK_REG(i) ((i) + 0x404)
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#define ACK_INT_STAT_REG(i) ((i) + 0x408)
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#define ACK_INT_CLR_REG(i) ((i) + 0x40c)
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#define ACK_INT_ENA_REG(i) ((i) + 0x500)
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#define ACK_INT_DIS_REG(i) ((i) + 0x504)
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#define DST_INT_RAW_REG(i) ((i) + 0x420)
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struct hi6220_mbox_chan {
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/*
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* Description for channel's hardware info:
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* - direction: tx or rx
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* - dst irq: peer core's irq number
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* - ack irq: local irq number
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* - slot number
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*/
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unsigned int dir, dst_irq, ack_irq;
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unsigned int slot;
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struct hi6220_mbox *parent;
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};
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struct hi6220_mbox {
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struct device *dev;
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int irq;
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/* flag of enabling tx's irq mode */
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bool tx_irq_mode;
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/* region for ipc event */
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void __iomem *ipc;
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/* region for mailbox */
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void __iomem *base;
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unsigned int chan_num;
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struct hi6220_mbox_chan *mchan;
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void *irq_map_chan[MBOX_CHAN_MAX];
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struct mbox_chan *chan;
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struct mbox_controller controller;
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};
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static void mbox_set_state(struct hi6220_mbox *mbox,
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unsigned int slot, u32 val)
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{
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u32 status;
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status = readl(mbox->base + MBOX_MODE_REG(slot));
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status = (status & ~MBOX_STATE_MASK) | val;
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writel(status, mbox->base + MBOX_MODE_REG(slot));
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}
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static void mbox_set_mode(struct hi6220_mbox *mbox,
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unsigned int slot, u32 val)
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{
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u32 mode;
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mode = readl(mbox->base + MBOX_MODE_REG(slot));
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mode = (mode & ~MBOX_ACK_CONFIG_MASK) | val;
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writel(mode, mbox->base + MBOX_MODE_REG(slot));
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}
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static bool hi6220_mbox_last_tx_done(struct mbox_chan *chan)
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{
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struct hi6220_mbox_chan *mchan = chan->con_priv;
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struct hi6220_mbox *mbox = mchan->parent;
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u32 state;
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/* Only set idle state for polling mode */
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BUG_ON(mbox->tx_irq_mode);
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state = readl(mbox->base + MBOX_MODE_REG(mchan->slot));
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return ((state & MBOX_STATE_MASK) == MBOX_STATE_IDLE);
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}
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static int hi6220_mbox_send_data(struct mbox_chan *chan, void *msg)
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{
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struct hi6220_mbox_chan *mchan = chan->con_priv;
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struct hi6220_mbox *mbox = mchan->parent;
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unsigned int slot = mchan->slot;
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u32 *buf = msg;
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int i;
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/* indicate as a TX channel */
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mchan->dir = MBOX_TX;
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mbox_set_state(mbox, slot, MBOX_STATE_TX);
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if (mbox->tx_irq_mode)
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mbox_set_mode(mbox, slot, MBOX_ACK_IRQ);
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else
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mbox_set_mode(mbox, slot, MBOX_ACK_AUTOMATIC);
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for (i = 0; i < MBOX_MSG_LEN; i++)
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writel(buf[i], mbox->base + MBOX_DATA_REG(slot) + i * 4);
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/* trigger remote request */
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writel(BIT(mchan->dst_irq), DST_INT_RAW_REG(mbox->ipc));
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return 0;
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}
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static irqreturn_t hi6220_mbox_interrupt(int irq, void *p)
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{
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struct hi6220_mbox *mbox = p;
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struct hi6220_mbox_chan *mchan;
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struct mbox_chan *chan;
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unsigned int state, intr_bit, i;
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u32 msg[MBOX_MSG_LEN];
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state = readl(ACK_INT_STAT_REG(mbox->ipc));
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if (!state) {
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dev_warn(mbox->dev, "%s: spurious interrupt\n",
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__func__);
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return IRQ_HANDLED;
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}
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while (state) {
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intr_bit = __ffs(state);
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state &= (state - 1);
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chan = mbox->irq_map_chan[intr_bit];
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if (!chan) {
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dev_warn(mbox->dev, "%s: unexpected irq vector %d\n",
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__func__, intr_bit);
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continue;
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}
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mchan = chan->con_priv;
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if (mchan->dir == MBOX_TX)
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mbox_chan_txdone(chan, 0);
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else {
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for (i = 0; i < MBOX_MSG_LEN; i++)
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msg[i] = readl(mbox->base +
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MBOX_DATA_REG(mchan->slot) + i * 4);
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mbox_chan_received_data(chan, (void *)msg);
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}
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/* clear IRQ source */
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writel(BIT(mchan->ack_irq), ACK_INT_CLR_REG(mbox->ipc));
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mbox_set_state(mbox, mchan->slot, MBOX_STATE_IDLE);
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}
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return IRQ_HANDLED;
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}
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static int hi6220_mbox_startup(struct mbox_chan *chan)
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{
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struct hi6220_mbox_chan *mchan = chan->con_priv;
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struct hi6220_mbox *mbox = mchan->parent;
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mchan->dir = 0;
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/* enable interrupt */
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writel(BIT(mchan->ack_irq), ACK_INT_ENA_REG(mbox->ipc));
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return 0;
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}
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static void hi6220_mbox_shutdown(struct mbox_chan *chan)
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{
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struct hi6220_mbox_chan *mchan = chan->con_priv;
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struct hi6220_mbox *mbox = mchan->parent;
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/* disable interrupt */
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writel(BIT(mchan->ack_irq), ACK_INT_DIS_REG(mbox->ipc));
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mbox->irq_map_chan[mchan->ack_irq] = NULL;
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}
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static const struct mbox_chan_ops hi6220_mbox_ops = {
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.send_data = hi6220_mbox_send_data,
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.startup = hi6220_mbox_startup,
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.shutdown = hi6220_mbox_shutdown,
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.last_tx_done = hi6220_mbox_last_tx_done,
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};
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static struct mbox_chan *hi6220_mbox_xlate(struct mbox_controller *controller,
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const struct of_phandle_args *spec)
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{
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struct hi6220_mbox *mbox = dev_get_drvdata(controller->dev);
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struct hi6220_mbox_chan *mchan;
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struct mbox_chan *chan;
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unsigned int i = spec->args[0];
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unsigned int dst_irq = spec->args[1];
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unsigned int ack_irq = spec->args[2];
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/* Bounds checking */
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if (i >= mbox->chan_num || dst_irq >= mbox->chan_num ||
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ack_irq >= mbox->chan_num) {
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dev_err(mbox->dev,
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"Invalid channel idx %d dst_irq %d ack_irq %d\n",
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i, dst_irq, ack_irq);
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return ERR_PTR(-EINVAL);
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}
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/* Is requested channel free? */
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chan = &mbox->chan[i];
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if (mbox->irq_map_chan[ack_irq] == (void *)chan) {
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dev_err(mbox->dev, "Channel in use\n");
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return ERR_PTR(-EBUSY);
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}
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mchan = chan->con_priv;
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mchan->dst_irq = dst_irq;
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mchan->ack_irq = ack_irq;
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mbox->irq_map_chan[ack_irq] = (void *)chan;
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return chan;
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}
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static const struct of_device_id hi6220_mbox_of_match[] = {
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{ .compatible = "hisilicon,hi6220-mbox", },
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{},
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};
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MODULE_DEVICE_TABLE(of, hi6220_mbox_of_match);
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static int hi6220_mbox_probe(struct platform_device *pdev)
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{
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struct device_node *node = pdev->dev.of_node;
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struct device *dev = &pdev->dev;
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struct hi6220_mbox *mbox;
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int i, err;
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mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
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if (!mbox)
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return -ENOMEM;
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mbox->dev = dev;
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mbox->chan_num = MBOX_CHAN_MAX;
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mbox->mchan = devm_kcalloc(dev,
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mbox->chan_num, sizeof(*mbox->mchan), GFP_KERNEL);
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if (!mbox->mchan)
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return -ENOMEM;
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mbox->chan = devm_kcalloc(dev,
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mbox->chan_num, sizeof(*mbox->chan), GFP_KERNEL);
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if (!mbox->chan)
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return -ENOMEM;
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mbox->irq = platform_get_irq(pdev, 0);
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if (mbox->irq < 0)
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return mbox->irq;
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mbox->ipc = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(mbox->ipc)) {
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dev_err(dev, "ioremap ipc failed\n");
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return PTR_ERR(mbox->ipc);
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}
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mbox->base = devm_platform_ioremap_resource(pdev, 1);
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if (IS_ERR(mbox->base)) {
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dev_err(dev, "ioremap buffer failed\n");
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return PTR_ERR(mbox->base);
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}
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err = devm_request_irq(dev, mbox->irq, hi6220_mbox_interrupt, 0,
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dev_name(dev), mbox);
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if (err) {
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dev_err(dev, "Failed to register a mailbox IRQ handler: %d\n",
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err);
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return -ENODEV;
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}
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mbox->controller.dev = dev;
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mbox->controller.chans = &mbox->chan[0];
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mbox->controller.num_chans = mbox->chan_num;
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mbox->controller.ops = &hi6220_mbox_ops;
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mbox->controller.of_xlate = hi6220_mbox_xlate;
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for (i = 0; i < mbox->chan_num; i++) {
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mbox->chan[i].con_priv = &mbox->mchan[i];
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mbox->irq_map_chan[i] = NULL;
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mbox->mchan[i].parent = mbox;
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mbox->mchan[i].slot = i;
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}
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/* mask and clear all interrupt vectors */
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writel(0x0, ACK_INT_MSK_REG(mbox->ipc));
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writel(~0x0, ACK_INT_CLR_REG(mbox->ipc));
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/* use interrupt for tx's ack */
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mbox->tx_irq_mode = !of_property_read_bool(node, "hi6220,mbox-tx-noirq");
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if (mbox->tx_irq_mode)
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mbox->controller.txdone_irq = true;
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else {
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mbox->controller.txdone_poll = true;
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mbox->controller.txpoll_period = 5;
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}
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err = devm_mbox_controller_register(dev, &mbox->controller);
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if (err) {
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dev_err(dev, "Failed to register mailbox %d\n", err);
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return err;
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}
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platform_set_drvdata(pdev, mbox);
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dev_info(dev, "Mailbox enabled\n");
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return 0;
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}
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static struct platform_driver hi6220_mbox_driver = {
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.driver = {
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.name = "hi6220-mbox",
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.of_match_table = hi6220_mbox_of_match,
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},
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.probe = hi6220_mbox_probe,
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};
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static int __init hi6220_mbox_init(void)
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{
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return platform_driver_register(&hi6220_mbox_driver);
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}
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core_initcall(hi6220_mbox_init);
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static void __exit hi6220_mbox_exit(void)
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{
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platform_driver_unregister(&hi6220_mbox_driver);
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}
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module_exit(hi6220_mbox_exit);
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MODULE_AUTHOR("Leo Yan <leo.yan@linaro.org>");
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MODULE_DESCRIPTION("Hi6220 mailbox driver");
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MODULE_LICENSE("GPL v2");
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