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0805861195
Plane allocation is a complex process, add debugging statements to help finding out what could might wrong. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
813 lines
21 KiB
C
813 lines
21 KiB
C
/*
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* rcar_du_kms.c -- R-Car Display Unit Mode Setting
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*
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* Copyright (C) 2013-2014 Renesas Electronics Corporation
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <linux/of_graph.h>
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#include <linux/wait.h>
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#include "rcar_du_crtc.h"
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#include "rcar_du_drv.h"
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#include "rcar_du_encoder.h"
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#include "rcar_du_kms.h"
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#include "rcar_du_lvdsenc.h"
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#include "rcar_du_regs.h"
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/* -----------------------------------------------------------------------------
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* Format helpers
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*/
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static const struct rcar_du_format_info rcar_du_format_infos[] = {
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{
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.fourcc = DRM_FORMAT_RGB565,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_ARGB1555,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_XRGB1555,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_XRGB8888,
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.bpp = 32,
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.planes = 1,
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.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
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.edf = PnDDCR4_EDF_RGB888,
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}, {
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.fourcc = DRM_FORMAT_ARGB8888,
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.bpp = 32,
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.planes = 1,
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.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
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.edf = PnDDCR4_EDF_ARGB8888,
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}, {
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.fourcc = DRM_FORMAT_UYVY,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_YUYV,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_NV12,
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.bpp = 12,
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.planes = 2,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_NV21,
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.bpp = 12,
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.planes = 2,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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/* In YUV 4:2:2, only NV16 is supported (NV61 isn't) */
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.fourcc = DRM_FORMAT_NV16,
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.bpp = 16,
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.planes = 2,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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},
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};
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const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
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if (rcar_du_format_infos[i].fourcc == fourcc)
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return &rcar_du_format_infos[i];
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}
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return NULL;
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}
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/* -----------------------------------------------------------------------------
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* Frame buffer
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*/
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int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
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struct drm_mode_create_dumb *args)
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{
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struct rcar_du_device *rcdu = dev->dev_private;
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unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
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unsigned int align;
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/* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
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* but the R8A7790 DU seems to require a 128 bytes pitch alignment.
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*/
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if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
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align = 128;
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else
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align = 16 * args->bpp / 8;
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args->pitch = roundup(min_pitch, align);
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return drm_gem_cma_dumb_create_internal(file, dev, args);
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}
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static struct drm_framebuffer *
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rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
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struct drm_mode_fb_cmd2 *mode_cmd)
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{
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struct rcar_du_device *rcdu = dev->dev_private;
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const struct rcar_du_format_info *format;
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unsigned int max_pitch;
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unsigned int align;
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unsigned int bpp;
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format = rcar_du_format_info(mode_cmd->pixel_format);
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if (format == NULL) {
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dev_dbg(dev->dev, "unsupported pixel format %08x\n",
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mode_cmd->pixel_format);
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return ERR_PTR(-EINVAL);
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}
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/*
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* The pitch and alignment constraints are expressed in pixels on the
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* hardware side and in bytes in the DRM API.
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*/
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bpp = format->planes == 2 ? 1 : format->bpp / 8;
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max_pitch = 4096 * bpp;
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if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
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align = 128;
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else
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align = 16 * bpp;
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if (mode_cmd->pitches[0] & (align - 1) ||
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mode_cmd->pitches[0] >= max_pitch) {
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dev_dbg(dev->dev, "invalid pitch value %u\n",
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mode_cmd->pitches[0]);
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return ERR_PTR(-EINVAL);
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}
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if (format->planes == 2) {
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if (mode_cmd->pitches[1] != mode_cmd->pitches[0]) {
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dev_dbg(dev->dev,
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"luma and chroma pitches do not match\n");
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return ERR_PTR(-EINVAL);
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}
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}
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return drm_fb_cma_create(dev, file_priv, mode_cmd);
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}
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static void rcar_du_output_poll_changed(struct drm_device *dev)
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{
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struct rcar_du_device *rcdu = dev->dev_private;
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drm_fbdev_cma_hotplug_event(rcdu->fbdev);
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}
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/* -----------------------------------------------------------------------------
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* Atomic Check and Update
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*/
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/*
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* Atomic hardware plane allocator
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*
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* The hardware plane allocator is solely based on the atomic plane states
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* without keeping any external state to avoid races between .atomic_check()
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* and .atomic_commit().
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*
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* The core idea is to avoid using a free planes bitmask that would need to be
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* shared between check and commit handlers with a collective knowledge based on
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* the allocated hardware plane(s) for each KMS plane. The allocator then loops
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* over all plane states to compute the free planes bitmask, allocates hardware
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* planes based on that bitmask, and stores the result back in the plane states.
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*
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* For this to work we need to access the current state of planes not touched by
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* the atomic update. To ensure that it won't be modified, we need to lock all
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* planes using drm_atomic_get_plane_state(). This effectively serializes atomic
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* updates from .atomic_check() up to completion (when swapping the states if
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* the check step has succeeded) or rollback (when freeing the states if the
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* check step has failed).
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*
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* Allocation is performed in the .atomic_check() handler and applied
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* automatically when the core swaps the old and new states.
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*/
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static bool rcar_du_plane_needs_realloc(struct rcar_du_plane *plane,
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struct rcar_du_plane_state *state)
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{
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const struct rcar_du_format_info *cur_format;
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cur_format = to_rcar_plane_state(plane->plane.state)->format;
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/* Lowering the number of planes doesn't strictly require reallocation
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* as the extra hardware plane will be freed when committing, but doing
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* so could lead to more fragmentation.
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*/
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return !cur_format || cur_format->planes != state->format->planes;
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}
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static unsigned int rcar_du_plane_hwmask(struct rcar_du_plane_state *state)
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{
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unsigned int mask;
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if (state->hwindex == -1)
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return 0;
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mask = 1 << state->hwindex;
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if (state->format->planes == 2)
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mask |= 1 << ((state->hwindex + 1) % 8);
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return mask;
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}
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static int rcar_du_plane_hwalloc(unsigned int num_planes, unsigned int free)
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{
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unsigned int i;
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for (i = 0; i < RCAR_DU_NUM_HW_PLANES; ++i) {
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if (!(free & (1 << i)))
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continue;
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if (num_planes == 1 || free & (1 << ((i + 1) % 8)))
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break;
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}
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return i == RCAR_DU_NUM_HW_PLANES ? -EBUSY : i;
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}
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static int rcar_du_atomic_check(struct drm_device *dev,
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struct drm_atomic_state *state)
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{
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struct rcar_du_device *rcdu = dev->dev_private;
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unsigned int group_freed_planes[RCAR_DU_MAX_GROUPS] = { 0, };
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unsigned int group_free_planes[RCAR_DU_MAX_GROUPS] = { 0, };
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bool needs_realloc = false;
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unsigned int groups = 0;
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unsigned int i;
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int ret;
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ret = drm_atomic_helper_check(dev, state);
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if (ret < 0)
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return ret;
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/* Check if hardware planes need to be reallocated. */
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for (i = 0; i < dev->mode_config.num_total_plane; ++i) {
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struct rcar_du_plane_state *plane_state;
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struct rcar_du_plane *plane;
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unsigned int index;
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if (!state->planes[i])
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continue;
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plane = to_rcar_plane(state->planes[i]);
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plane_state = to_rcar_plane_state(state->plane_states[i]);
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dev_dbg(rcdu->dev, "%s: checking plane (%u,%u)\n", __func__,
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plane->group->index, plane - plane->group->planes);
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/* If the plane is being disabled we don't need to go through
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* the full reallocation procedure. Just mark the hardware
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* plane(s) as freed.
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*/
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if (!plane_state->format) {
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dev_dbg(rcdu->dev, "%s: plane is being disabled\n",
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__func__);
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index = plane - plane->group->planes;
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group_freed_planes[plane->group->index] |= 1 << index;
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plane_state->hwindex = -1;
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continue;
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}
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/* If the plane needs to be reallocated mark it as such, and
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* mark the hardware plane(s) as free.
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*/
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if (rcar_du_plane_needs_realloc(plane, plane_state)) {
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dev_dbg(rcdu->dev, "%s: plane needs reallocation\n",
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__func__);
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groups |= 1 << plane->group->index;
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needs_realloc = true;
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index = plane - plane->group->planes;
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group_freed_planes[plane->group->index] |= 1 << index;
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plane_state->hwindex = -1;
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}
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}
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if (!needs_realloc)
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return 0;
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/* Grab all plane states for the groups that need reallocation to ensure
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* locking and avoid racy updates. This serializes the update operation,
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* but there's not much we can do about it as that's the hardware
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* design.
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*
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* Compute the used planes mask for each group at the same time to avoid
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* looping over the planes separately later.
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*/
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while (groups) {
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unsigned int index = ffs(groups) - 1;
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struct rcar_du_group *group = &rcdu->groups[index];
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unsigned int used_planes = 0;
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dev_dbg(rcdu->dev, "%s: finding free planes for group %u\n",
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__func__, index);
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for (i = 0; i < RCAR_DU_NUM_KMS_PLANES; ++i) {
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struct rcar_du_plane *plane = &group->planes[i];
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struct rcar_du_plane_state *plane_state;
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struct drm_plane_state *s;
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s = drm_atomic_get_plane_state(state, &plane->plane);
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if (IS_ERR(s))
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return PTR_ERR(s);
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/* If the plane has been freed in the above loop its
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* hardware planes must not be added to the used planes
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* bitmask. However, the current state doesn't reflect
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* the free state yet, as we've modified the new state
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* above. Use the local freed planes list to check for
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* that condition instead.
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*/
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if (group_freed_planes[index] & (1 << i)) {
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dev_dbg(rcdu->dev,
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"%s: plane (%u,%u) has been freed, skipping\n",
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__func__, plane->group->index,
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plane - plane->group->planes);
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continue;
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}
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plane_state = to_rcar_plane_state(plane->plane.state);
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used_planes |= rcar_du_plane_hwmask(plane_state);
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dev_dbg(rcdu->dev,
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"%s: plane (%u,%u) uses %u hwplanes (index %d)\n",
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__func__, plane->group->index,
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plane - plane->group->planes,
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plane_state->format ?
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plane_state->format->planes : 0,
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plane_state->hwindex);
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}
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group_free_planes[index] = 0xff & ~used_planes;
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groups &= ~(1 << index);
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dev_dbg(rcdu->dev, "%s: group %u free planes mask 0x%02x\n",
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__func__, index, group_free_planes[index]);
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}
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/* Reallocate hardware planes for each plane that needs it. */
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for (i = 0; i < dev->mode_config.num_total_plane; ++i) {
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struct rcar_du_plane_state *plane_state;
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struct rcar_du_plane *plane;
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int idx;
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if (!state->planes[i])
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continue;
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plane = to_rcar_plane(state->planes[i]);
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plane_state = to_rcar_plane_state(state->plane_states[i]);
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dev_dbg(rcdu->dev, "%s: allocating plane (%u,%u)\n", __func__,
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plane->group->index, plane - plane->group->planes);
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/* Skip planes that are being disabled or don't need to be
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* reallocated.
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*/
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if (!plane_state->format ||
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!rcar_du_plane_needs_realloc(plane, plane_state))
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continue;
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idx = rcar_du_plane_hwalloc(plane_state->format->planes,
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group_free_planes[plane->group->index]);
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if (idx < 0) {
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dev_dbg(rcdu->dev, "%s: no available hardware plane\n",
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__func__);
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return idx;
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}
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dev_dbg(rcdu->dev, "%s: allocated %u hwplanes (index %u)\n",
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__func__, plane_state->format->planes, idx);
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plane_state->hwindex = idx;
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group_free_planes[plane->group->index] &=
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~rcar_du_plane_hwmask(plane_state);
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dev_dbg(rcdu->dev, "%s: group %u free planes mask 0x%02x\n",
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__func__, plane->group->index,
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group_free_planes[plane->group->index]);
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}
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return 0;
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}
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struct rcar_du_commit {
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struct work_struct work;
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struct drm_device *dev;
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struct drm_atomic_state *state;
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u32 crtcs;
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};
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static void rcar_du_atomic_complete(struct rcar_du_commit *commit)
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{
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struct drm_device *dev = commit->dev;
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struct rcar_du_device *rcdu = dev->dev_private;
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struct drm_atomic_state *old_state = commit->state;
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/* Apply the atomic update. */
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drm_atomic_helper_commit_modeset_disables(dev, old_state);
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drm_atomic_helper_commit_modeset_enables(dev, old_state);
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drm_atomic_helper_commit_planes(dev, old_state);
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drm_atomic_helper_wait_for_vblanks(dev, old_state);
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drm_atomic_helper_cleanup_planes(dev, old_state);
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drm_atomic_state_free(old_state);
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/* Complete the commit, wake up any waiter. */
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spin_lock(&rcdu->commit.wait.lock);
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rcdu->commit.pending &= ~commit->crtcs;
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wake_up_all_locked(&rcdu->commit.wait);
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spin_unlock(&rcdu->commit.wait.lock);
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kfree(commit);
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}
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static void rcar_du_atomic_work(struct work_struct *work)
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{
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struct rcar_du_commit *commit =
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container_of(work, struct rcar_du_commit, work);
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rcar_du_atomic_complete(commit);
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}
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static int rcar_du_atomic_commit(struct drm_device *dev,
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struct drm_atomic_state *state, bool async)
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{
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struct rcar_du_device *rcdu = dev->dev_private;
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struct rcar_du_commit *commit;
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unsigned int i;
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int ret;
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ret = drm_atomic_helper_prepare_planes(dev, state);
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if (ret)
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return ret;
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/* Allocate the commit object. */
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commit = kzalloc(sizeof(*commit), GFP_KERNEL);
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if (commit == NULL)
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return -ENOMEM;
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INIT_WORK(&commit->work, rcar_du_atomic_work);
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commit->dev = dev;
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commit->state = state;
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|
|
|
/* Wait until all affected CRTCs have completed previous commits and
|
|
* mark them as pending.
|
|
*/
|
|
for (i = 0; i < dev->mode_config.num_crtc; ++i) {
|
|
if (state->crtcs[i])
|
|
commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
|
|
}
|
|
|
|
spin_lock(&rcdu->commit.wait.lock);
|
|
ret = wait_event_interruptible_locked(rcdu->commit.wait,
|
|
!(rcdu->commit.pending & commit->crtcs));
|
|
if (ret == 0)
|
|
rcdu->commit.pending |= commit->crtcs;
|
|
spin_unlock(&rcdu->commit.wait.lock);
|
|
|
|
if (ret) {
|
|
kfree(commit);
|
|
return ret;
|
|
}
|
|
|
|
/* Swap the state, this is the point of no return. */
|
|
drm_atomic_helper_swap_state(dev, state);
|
|
|
|
if (async)
|
|
schedule_work(&commit->work);
|
|
else
|
|
rcar_du_atomic_complete(commit);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* Initialization
|
|
*/
|
|
|
|
static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
|
|
.fb_create = rcar_du_fb_create,
|
|
.output_poll_changed = rcar_du_output_poll_changed,
|
|
.atomic_check = rcar_du_atomic_check,
|
|
.atomic_commit = rcar_du_atomic_commit,
|
|
};
|
|
|
|
static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
|
|
enum rcar_du_output output,
|
|
struct of_endpoint *ep)
|
|
{
|
|
static const struct {
|
|
const char *compatible;
|
|
enum rcar_du_encoder_type type;
|
|
} encoders[] = {
|
|
{ "adi,adv7123", RCAR_DU_ENCODER_VGA },
|
|
{ "adi,adv7511w", RCAR_DU_ENCODER_HDMI },
|
|
{ "thine,thc63lvdm83d", RCAR_DU_ENCODER_LVDS },
|
|
};
|
|
|
|
enum rcar_du_encoder_type enc_type = RCAR_DU_ENCODER_NONE;
|
|
struct device_node *connector = NULL;
|
|
struct device_node *encoder = NULL;
|
|
struct device_node *ep_node = NULL;
|
|
struct device_node *entity_ep_node;
|
|
struct device_node *entity;
|
|
int ret;
|
|
|
|
/*
|
|
* Locate the connected entity and infer its type from the number of
|
|
* endpoints.
|
|
*/
|
|
entity = of_graph_get_remote_port_parent(ep->local_node);
|
|
if (!entity) {
|
|
dev_dbg(rcdu->dev, "unconnected endpoint %s, skipping\n",
|
|
ep->local_node->full_name);
|
|
return 0;
|
|
}
|
|
|
|
entity_ep_node = of_parse_phandle(ep->local_node, "remote-endpoint", 0);
|
|
|
|
for_each_endpoint_of_node(entity, ep_node) {
|
|
if (ep_node == entity_ep_node)
|
|
continue;
|
|
|
|
/*
|
|
* We've found one endpoint other than the input, this must
|
|
* be an encoder. Locate the connector.
|
|
*/
|
|
encoder = entity;
|
|
connector = of_graph_get_remote_port_parent(ep_node);
|
|
of_node_put(ep_node);
|
|
|
|
if (!connector) {
|
|
dev_warn(rcdu->dev,
|
|
"no connector for encoder %s, skipping\n",
|
|
encoder->full_name);
|
|
of_node_put(entity_ep_node);
|
|
of_node_put(encoder);
|
|
return 0;
|
|
}
|
|
|
|
break;
|
|
}
|
|
|
|
of_node_put(entity_ep_node);
|
|
|
|
if (encoder) {
|
|
/*
|
|
* If an encoder has been found, get its type based on its
|
|
* compatible string.
|
|
*/
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(encoders); ++i) {
|
|
if (of_device_is_compatible(encoder,
|
|
encoders[i].compatible)) {
|
|
enc_type = encoders[i].type;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (i == ARRAY_SIZE(encoders)) {
|
|
dev_warn(rcdu->dev,
|
|
"unknown encoder type for %s, skipping\n",
|
|
encoder->full_name);
|
|
of_node_put(encoder);
|
|
of_node_put(connector);
|
|
return 0;
|
|
}
|
|
} else {
|
|
/*
|
|
* If no encoder has been found the entity must be the
|
|
* connector.
|
|
*/
|
|
connector = entity;
|
|
}
|
|
|
|
ret = rcar_du_encoder_init(rcdu, enc_type, output, encoder, connector);
|
|
of_node_put(encoder);
|
|
of_node_put(connector);
|
|
|
|
return ret < 0 ? ret : 1;
|
|
}
|
|
|
|
static int rcar_du_encoders_init(struct rcar_du_device *rcdu)
|
|
{
|
|
struct device_node *np = rcdu->dev->of_node;
|
|
struct device_node *ep_node;
|
|
unsigned int num_encoders = 0;
|
|
|
|
/*
|
|
* Iterate over the endpoints and create one encoder for each output
|
|
* pipeline.
|
|
*/
|
|
for_each_endpoint_of_node(np, ep_node) {
|
|
enum rcar_du_output output;
|
|
struct of_endpoint ep;
|
|
unsigned int i;
|
|
int ret;
|
|
|
|
ret = of_graph_parse_endpoint(ep_node, &ep);
|
|
if (ret < 0) {
|
|
of_node_put(ep_node);
|
|
return ret;
|
|
}
|
|
|
|
/* Find the output route corresponding to the port number. */
|
|
for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) {
|
|
if (rcdu->info->routes[i].possible_crtcs &&
|
|
rcdu->info->routes[i].port == ep.port) {
|
|
output = i;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (i == RCAR_DU_OUTPUT_MAX) {
|
|
dev_warn(rcdu->dev,
|
|
"port %u references unexisting output, skipping\n",
|
|
ep.port);
|
|
continue;
|
|
}
|
|
|
|
/* Process the output pipeline. */
|
|
ret = rcar_du_encoders_init_one(rcdu, output, &ep);
|
|
if (ret < 0) {
|
|
if (ret == -EPROBE_DEFER) {
|
|
of_node_put(ep_node);
|
|
return ret;
|
|
}
|
|
|
|
dev_info(rcdu->dev,
|
|
"encoder initialization failed, skipping\n");
|
|
continue;
|
|
}
|
|
|
|
num_encoders += ret;
|
|
}
|
|
|
|
return num_encoders;
|
|
}
|
|
|
|
static int rcar_du_properties_init(struct rcar_du_device *rcdu)
|
|
{
|
|
rcdu->props.alpha =
|
|
drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
|
|
if (rcdu->props.alpha == NULL)
|
|
return -ENOMEM;
|
|
|
|
/* The color key is expressed as an RGB888 triplet stored in a 32-bit
|
|
* integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
|
|
* or enable source color keying (1).
|
|
*/
|
|
rcdu->props.colorkey =
|
|
drm_property_create_range(rcdu->ddev, 0, "colorkey",
|
|
0, 0x01ffffff);
|
|
if (rcdu->props.colorkey == NULL)
|
|
return -ENOMEM;
|
|
|
|
rcdu->props.zpos =
|
|
drm_property_create_range(rcdu->ddev, 0, "zpos", 1, 7);
|
|
if (rcdu->props.zpos == NULL)
|
|
return -ENOMEM;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int rcar_du_modeset_init(struct rcar_du_device *rcdu)
|
|
{
|
|
static const unsigned int mmio_offsets[] = {
|
|
DU0_REG_OFFSET, DU2_REG_OFFSET
|
|
};
|
|
|
|
struct drm_device *dev = rcdu->ddev;
|
|
struct drm_encoder *encoder;
|
|
struct drm_fbdev_cma *fbdev;
|
|
unsigned int num_encoders;
|
|
unsigned int num_groups;
|
|
unsigned int i;
|
|
int ret;
|
|
|
|
drm_mode_config_init(dev);
|
|
|
|
dev->mode_config.min_width = 0;
|
|
dev->mode_config.min_height = 0;
|
|
dev->mode_config.max_width = 4095;
|
|
dev->mode_config.max_height = 2047;
|
|
dev->mode_config.funcs = &rcar_du_mode_config_funcs;
|
|
|
|
rcdu->num_crtcs = rcdu->info->num_crtcs;
|
|
|
|
ret = rcar_du_properties_init(rcdu);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* Initialize the groups. */
|
|
num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
|
|
|
|
for (i = 0; i < num_groups; ++i) {
|
|
struct rcar_du_group *rgrp = &rcdu->groups[i];
|
|
|
|
mutex_init(&rgrp->lock);
|
|
|
|
rgrp->dev = rcdu;
|
|
rgrp->mmio_offset = mmio_offsets[i];
|
|
rgrp->index = i;
|
|
|
|
ret = rcar_du_planes_init(rgrp);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
/* Create the CRTCs. */
|
|
for (i = 0; i < rcdu->num_crtcs; ++i) {
|
|
struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
|
|
|
|
ret = rcar_du_crtc_create(rgrp, i);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
/* Initialize the encoders. */
|
|
ret = rcar_du_lvdsenc_init(rcdu);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = rcar_du_encoders_init(rcdu);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
if (ret == 0) {
|
|
dev_err(rcdu->dev, "error: no encoder could be initialized\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
num_encoders = ret;
|
|
|
|
/* Set the possible CRTCs and possible clones. There's always at least
|
|
* one way for all encoders to clone each other, set all bits in the
|
|
* possible clones field.
|
|
*/
|
|
list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
|
|
struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
|
|
const struct rcar_du_output_routing *route =
|
|
&rcdu->info->routes[renc->output];
|
|
|
|
encoder->possible_crtcs = route->possible_crtcs;
|
|
encoder->possible_clones = (1 << num_encoders) - 1;
|
|
}
|
|
|
|
drm_mode_config_reset(dev);
|
|
|
|
drm_kms_helper_poll_init(dev);
|
|
|
|
if (dev->mode_config.num_connector) {
|
|
fbdev = drm_fbdev_cma_init(dev, 32, dev->mode_config.num_crtc,
|
|
dev->mode_config.num_connector);
|
|
if (IS_ERR(fbdev))
|
|
return PTR_ERR(fbdev);
|
|
|
|
rcdu->fbdev = fbdev;
|
|
} else {
|
|
dev_info(rcdu->dev,
|
|
"no connector found, disabling fbdev emulation\n");
|
|
}
|
|
|
|
return 0;
|
|
}
|