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07ad64b60c
The omap4 es2 hsmmc has a updated soft reset logic.After the reset is issued monitor a 0->1 transition first. The reset of CMD or DATA lines is complete only after a 0->1->0 transition of SRC or SRD bits. Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com> Tested-by: Anand Gadiyar <gadiyar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
179 lines
5.1 KiB
C
179 lines
5.1 KiB
C
/*
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* MMC definitions for OMAP2
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*
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* Copyright (C) 2006 Nokia Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __OMAP2_MMC_H
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#define __OMAP2_MMC_H
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/mmc/host.h>
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#include <plat/board.h>
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#define OMAP15XX_NR_MMC 1
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#define OMAP16XX_NR_MMC 2
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#define OMAP1_MMC_SIZE 0x080
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#define OMAP1_MMC1_BASE 0xfffb7800
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#define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */
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#define OMAP24XX_NR_MMC 2
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#define OMAP34XX_NR_MMC 3
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#define OMAP44XX_NR_MMC 5
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#define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE
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#define OMAP3_HSMMC_SIZE 0x200
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#define OMAP4_HSMMC_SIZE 0x1000
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#define OMAP2_MMC1_BASE 0x4809c000
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#define OMAP2_MMC2_BASE 0x480b4000
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#define OMAP3_MMC3_BASE 0x480ad000
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#define OMAP4_MMC4_BASE 0x480d1000
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#define OMAP4_MMC5_BASE 0x480d5000
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#define OMAP4_MMC_REG_OFFSET 0x100
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#define HSMMC5 (1 << 4)
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#define HSMMC4 (1 << 3)
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#define HSMMC3 (1 << 2)
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#define HSMMC2 (1 << 1)
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#define HSMMC1 (1 << 0)
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#define OMAP_MMC_MAX_SLOTS 2
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struct omap_mmc_platform_data {
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/* back-link to device */
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struct device *dev;
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/* number of slots per controller */
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unsigned nr_slots:2;
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/* set if your board has components or wiring that limits the
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* maximum frequency on the MMC bus */
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unsigned int max_freq;
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/* switch the bus to a new slot */
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int (*switch_slot)(struct device *dev, int slot);
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/* initialize board-specific MMC functionality, can be NULL if
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* not supported */
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int (*init)(struct device *dev);
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void (*cleanup)(struct device *dev);
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void (*shutdown)(struct device *dev);
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/* To handle board related suspend/resume functionality for MMC */
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int (*suspend)(struct device *dev, int slot);
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int (*resume)(struct device *dev, int slot);
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/* Return context loss count due to PM states changing */
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int (*get_context_loss_count)(struct device *dev);
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u64 dma_mask;
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struct omap_mmc_slot_data {
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/* 4/8 wires and any additional host capabilities
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* need to OR'd all capabilities (ref. linux/mmc/host.h) */
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u32 caps;
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/*
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* nomux means "standard" muxing is wrong on this board, and
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* that board-specific code handled it before common init logic.
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*/
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unsigned nomux:1;
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/* switch pin can be for card detect (default) or card cover */
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unsigned cover:1;
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/* use the internal clock */
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unsigned internal_clock:1;
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/* nonremovable e.g. eMMC */
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unsigned nonremovable:1;
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/* Try to sleep or power off when possible */
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unsigned power_saving:1;
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/* If using power_saving and the MMC power is not to go off */
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unsigned no_off:1;
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/* Regulator off remapped to sleep */
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unsigned vcc_aux_disable_is_sleep:1;
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/* we can put the features above into this variable */
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#define HSMMC_HAS_PBIAS (1 << 0)
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#define HSMMC_HAS_UPDATED_RESET (1 << 1)
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unsigned features;
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int switch_pin; /* gpio (card detect) */
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int gpio_wp; /* gpio (write protect) */
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int (*set_bus_mode)(struct device *dev, int slot, int bus_mode);
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int (*set_power)(struct device *dev, int slot,
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int power_on, int vdd);
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int (*get_ro)(struct device *dev, int slot);
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int (*set_sleep)(struct device *dev, int slot, int sleep,
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int vdd, int cardsleep);
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void (*remux)(struct device *dev, int slot, int power_on);
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/* Call back before enabling / disabling regulators */
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void (*before_set_reg)(struct device *dev, int slot,
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int power_on, int vdd);
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/* Call back after enabling / disabling regulators */
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void (*after_set_reg)(struct device *dev, int slot,
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int power_on, int vdd);
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/* if we have special card, init it using this callback */
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void (*init_card)(struct mmc_card *card);
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/* return MMC cover switch state, can be NULL if not supported.
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*
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* possible return values:
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* 0 - closed
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* 1 - open
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*/
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int (*get_cover_state)(struct device *dev, int slot);
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const char *name;
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u32 ocr_mask;
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/* Card detection IRQs */
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int card_detect_irq;
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int (*card_detect)(struct device *dev, int slot);
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unsigned int ban_openended:1;
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} slots[OMAP_MMC_MAX_SLOTS];
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};
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/* called from board-specific card detection service routine */
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extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
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int is_closed);
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#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
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defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
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void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
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int nr_controllers);
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void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
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int nr_controllers);
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int omap_mmc_add(const char *name, int id, unsigned long base,
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unsigned long size, unsigned int irq,
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struct omap_mmc_platform_data *data);
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#else
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static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
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int nr_controllers)
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{
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}
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static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
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int nr_controllers)
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{
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}
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static inline int omap_mmc_add(const char *name, int id, unsigned long base,
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unsigned long size, unsigned int irq,
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struct omap_mmc_platform_data *data)
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{
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return 0;
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}
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#endif
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#endif
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