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2ec459f2a7
When called from prom init code, bcm63xx_gpio_init() will fail as it
will call gpiochip_add() which relies on a working kmalloc() to alloc
the gpio_desc array and kmalloc is not useable yet at prom init time.
Move bcm63xx_gpio_init() to bcm63xx_register_devices() (an
arch_initcall) where kmalloc works.
Fixes: 14e85c0e69 ("gpio: remove gpio_descs global array")
Signed-off-by: Nicolas Schichan <nschichan@freebox.fr>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Alexandre Courbot <acourbot@nvidia.com>
Patchwork: https://patchwork.linux-mips.org/patch/9530/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
101 lines
2.5 KiB
C
101 lines
2.5 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
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*/
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#include <linux/init.h>
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#include <linux/bootmem.h>
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#include <linux/smp.h>
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#include <asm/bootinfo.h>
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#include <asm/bmips.h>
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#include <asm/smp-ops.h>
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#include <asm/mipsregs.h>
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#include <bcm63xx_board.h>
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#include <bcm63xx_cpu.h>
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#include <bcm63xx_io.h>
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#include <bcm63xx_regs.h>
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void __init prom_init(void)
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{
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u32 reg, mask;
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bcm63xx_cpu_init();
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/* stop any running watchdog */
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bcm_wdt_writel(WDT_STOP_1, WDT_CTL_REG);
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bcm_wdt_writel(WDT_STOP_2, WDT_CTL_REG);
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/* disable all hardware blocks clock for now */
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if (BCMCPU_IS_3368())
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mask = CKCTL_3368_ALL_SAFE_EN;
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else if (BCMCPU_IS_6328())
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mask = CKCTL_6328_ALL_SAFE_EN;
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else if (BCMCPU_IS_6338())
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mask = CKCTL_6338_ALL_SAFE_EN;
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else if (BCMCPU_IS_6345())
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mask = CKCTL_6345_ALL_SAFE_EN;
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else if (BCMCPU_IS_6348())
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mask = CKCTL_6348_ALL_SAFE_EN;
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else if (BCMCPU_IS_6358())
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mask = CKCTL_6358_ALL_SAFE_EN;
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else if (BCMCPU_IS_6362())
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mask = CKCTL_6362_ALL_SAFE_EN;
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else if (BCMCPU_IS_6368())
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mask = CKCTL_6368_ALL_SAFE_EN;
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else
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mask = 0;
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reg = bcm_perf_readl(PERF_CKCTL_REG);
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reg &= ~mask;
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bcm_perf_writel(reg, PERF_CKCTL_REG);
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/* do low level board init */
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board_prom_init();
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/* set up SMP */
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if (!register_bmips_smp_ops()) {
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/*
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* BCM6328 might not have its second CPU enabled, while BCM3368
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* and BCM6358 need special handling for their shared TLB, so
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* disable SMP for now.
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*/
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if (BCMCPU_IS_6328()) {
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reg = bcm_readl(BCM_6328_OTP_BASE +
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OTP_USER_BITS_6328_REG(3));
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if (reg & OTP_6328_REG3_TP1_DISABLED)
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bmips_smp_enabled = 0;
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} else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
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bmips_smp_enabled = 0;
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}
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if (!bmips_smp_enabled)
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return;
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/*
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* The bootloader has set up the CPU1 reset vector at
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* 0xa000_0200.
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* This conflicts with the special interrupt vector (IV).
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* The bootloader has also set up CPU1 to respond to the wrong
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* IPI interrupt.
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* Here we will start up CPU1 in the background and ask it to
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* reconfigure itself then go back to sleep.
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*/
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memcpy((void *)0xa0000200, &bmips_smp_movevec, 0x20);
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__sync();
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set_c0_cause(C_SW0);
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cpumask_set_cpu(1, &bmips_booted_mask);
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/*
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* FIXME: we really should have some sort of hazard barrier here
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*/
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}
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}
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void __init prom_free_prom_memory(void)
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{
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}
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