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This patch documents OF bindings for the Freescale Enhanced Secure Digital Host Controller. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
25 lines
790 B
Plaintext
25 lines
790 B
Plaintext
* Freescale Enhanced Secure Digital Host Controller (eSDHC)
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The Enhanced Secure Digital Host Controller provides an interface
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for MMC, SD, and SDIO types of memory cards.
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Required properties:
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- compatible : should be
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"fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors.
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"fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors.
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- reg : should contain eSDHC registers location and length.
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- interrupts : should contain eSDHC interrupt.
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- interrupt-parent : interrupt source phandle.
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- clock-frequency : specifies eSDHC base clock frequency.
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Example:
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sdhci@2e000 {
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compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
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reg = <0x2e000 0x1000>;
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interrupts = <42 0x8>;
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interrupt-parent = <&ipic>;
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/* Filled in by U-Boot */
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clock-frequency = <0>;
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};
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