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7ec79d3850
This is initial amplifier driver for rt1019. Signed-off-by: Jack Yu <jack.yu@realtek.com> Link: https://lore.kernel.org/r/20210311025809.31852-1-jack.yu@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
321 lines
9.9 KiB
C
321 lines
9.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* rt1019.h -- RT1019 ALSA SoC audio amplifier driver
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*
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* Copyright(c) 2021 Realtek Semiconductor Corp.
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*/
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#ifndef __RT1019_H__
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#define __RT1019_H__
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#define RT1019_DEVICE_ID_VAL 0x1019
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#define RT1019_DEVICE_ID_VAL2 0x6731
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#define RT1019_RESET 0x0000
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#define RT1019_PAD_DRV_1 0x0002
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#define RT1019_PAD_DRV_2 0x0003
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#define RT1019_PAD_PULL_1 0x0005
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#define RT1019_PAD_PULL_2 0x0006
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#define RT1019_PAD_PULL_3 0x0007
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#define RT1019_I2C_CTRL_1 0x0008
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#define RT1019_I2C_CTRL_2 0x0009
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#define RT1019_I2C_CTRL_3 0x000a
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#define RT1019_IDS_CTRL 0x0011
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#define RT1019_ASEL_CTRL 0x0013
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#define RT1019_PLL_RESET 0x0015
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#define RT1019_PWR_STRP_1 0x0017
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#define RT1019_PWR_STRP_2 0x0019
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#define RT1019_BEEP_TONE 0x001b
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#define RT1019_SIL_DET_GAT 0x001d
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#define RT1019_CLASSD_TIME 0x001f
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#define RT1019_CLASSD_OCP 0x0021
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#define RT1019_PHASE_SYNC 0x0023
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#define RT1019_STAT_MACH_1 0x0025
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#define RT1019_STAT_MACH_2 0x0026
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#define RT1019_EFF_CTRL 0x0028
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#define RT1019_FS_DET_1 0x002a
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#define RT1019_FS_DET_2 0x002b
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#define RT1019_FS_DET_3 0x002c
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#define RT1019_FS_DET_4 0x002d
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#define RT1019_FS_DET_5 0x002e
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#define RT1019_FS_DET_6 0x002f
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#define RT1019_FS_DET_7 0x0030
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#define RT1019_ANA_CTRL 0x0053
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#define RT1019_DUMMY_A 0x0055
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#define RT1019_DUMMY_B 0x0056
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#define RT1019_DUMMY_C 0x0057
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#define RT1019_DUMMY_D 0x0058
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#define RT1019_ANA_READ 0x005a
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#define RT1019_VER_ID 0x005c
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#define RT1019_CUSTOM_ID 0x005d
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#define RT1019_VEND_ID_1 0x005e
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#define RT1019_VEND_ID_2 0x005f
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#define RT1019_DEV_ID_1 0x0061
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#define RT1019_DEV_ID_2 0x0062
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#define RT1019_TEST_PAD 0x0064
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#define RT1019_SDB_CTRL 0x0066
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#define RT1019_TEST_CTRL_1 0x0068
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#define RT1019_TEST_CTRL_2 0x006a
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#define RT1019_TEST_CTRL_3 0x006c
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#define RT1019_SCAN_MODE 0x006e
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#define RT1019_CLK_TREE_1 0x0100
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#define RT1019_CLK_TREE_2 0x0101
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#define RT1019_CLK_TREE_3 0x0102
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#define RT1019_CLK_TREE_4 0x0103
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#define RT1019_CLK_TREE_5 0x0104
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#define RT1019_CLK_TREE_6 0x0105
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#define RT1019_CLK_TREE_7 0x0106
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#define RT1019_CLK_TREE_8 0x0107
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#define RT1019_CLK_TREE_9 0x0108
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#define RT1019_ASRC_1 0x0200
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#define RT1019_ASRC_2 0x0201
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#define RT1019_ASRC_3 0x0202
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#define RT1019_ASRC_4 0x0203
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#define RT1019_SYS_CLK 0x0300
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#define RT1019_BIAS_CUR_1 0x0301
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#define RT1019_BIAS_CUR_2 0x0302
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#define RT1019_BIAS_CUR_3 0x0303
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#define RT1019_BIAS_CUR_4 0x0304
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#define RT1019_CHOP_CLK_DAC 0x0306
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#define RT1019_CHOP_CLK_ADC 0x0308
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#define RT1019_LDO_CTRL_1 0x030a
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#define RT1019_LDO_CTRL_2 0x030b
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#define RT1019_PM_ANA_1 0x030d
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#define RT1019_PM_ANA_2 0x030e
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#define RT1019_PM_ANA_3 0x030f
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#define RT1019_PLL_1 0x0311
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#define RT1019_PLL_2 0x0312
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#define RT1019_PLL_3 0x0313
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#define RT1019_PLL_INT_1 0x0315
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#define RT1019_PLL_INT_3 0x0318
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#define RT1019_MIXER 0x031a
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#define RT1019_CLD_OUT_1 0x031c
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#define RT1019_CLD_OUT_2 0x031d
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#define RT1019_CLD_OUT_3 0x031e
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#define RT1019_CLD_OUT_4 0x031f
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#define RT1019_CLD_OUT_5 0x0320
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#define RT1019_CLD_OUT_6 0x0321
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#define RT1019_CLS_INT_REG_1 0x0323
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#define RT1019_CLS_INT_REG_2 0x0324
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#define RT1019_CLS_INT_REG_3 0x0325
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#define RT1019_CLS_INT_REG_4 0x0326
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#define RT1019_CLS_INT_REG_5 0x0327
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#define RT1019_CLS_INT_REG_6 0x0328
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#define RT1019_CLS_INT_REG_7 0x0329
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#define RT1019_CLS_INT_REG_8 0x0330
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#define RT1019_CLS_INT_REG_9 0x0331
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#define RT1019_CLS_INT_REG_10 0x0332
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#define RT1019_TDM_1 0x0400
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#define RT1019_TDM_2 0x0401
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#define RT1019_TDM_3 0x0402
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#define RT1019_TDM_4 0x0403
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#define RT1019_TDM_5 0x0404
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#define RT1019_TDM_6 0x0405
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#define RT1019_DVOL_1 0x0500
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#define RT1019_DVOL_2 0x0501
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#define RT1019_DVOL_3 0x0502
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#define RT1019_DVOL_4 0x0503
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#define RT1019_DMIX_MONO_1 0x0504
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#define RT1019_DMIX_MONO_2 0x0505
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#define RT1019_CAL_TOP_1 0x0600
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#define RT1019_CAL_TOP_2 0x0601
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#define RT1019_CAL_TOP_3 0x0602
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#define RT1019_CAL_TOP_4 0x0603
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#define RT1019_CAL_TOP_5 0x0604
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#define RT1019_CAL_TOP_6 0x0605
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#define RT1019_CAL_TOP_7 0x0606
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#define RT1019_CAL_TOP_8 0x0607
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#define RT1019_CAL_TOP_9 0x0608
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#define RT1019_CAL_TOP_10 0x0609
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#define RT1019_CAL_TOP_11 0x060a
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#define RT1019_CAL_TOP_12 0x060b
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#define RT1019_CAL_TOP_13 0x060c
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#define RT1019_CAL_TOP_14 0x060d
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#define RT1019_CAL_TOP_15 0x060e
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#define RT1019_CAL_TOP_16 0x060f
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#define RT1019_CAL_TOP_17 0x0610
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#define RT1019_CAL_TOP_18 0x0611
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#define RT1019_CAL_TOP_19 0x0612
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#define RT1019_CAL_TOP_20 0x0613
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#define RT1019_CAL_TOP_21 0x0614
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#define RT1019_CAL_TOP_22 0x0615
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#define RT1019_MDRE_CTRL_1 0x0700
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#define RT1019_MDRE_CTRL_2 0x0701
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#define RT1019_MDRE_CTRL_3 0x0702
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#define RT1019_MDRE_CTRL_4 0x0703
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#define RT1019_MDRE_CTRL_5 0x0704
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#define RT1019_MDRE_CTRL_6 0x0705
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#define RT1019_MDRE_CTRL_7 0x0706
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#define RT1019_MDRE_CTRL_8 0x0707
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#define RT1019_MDRE_CTRL_9 0x0708
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#define RT1019_MDRE_CTRL_10 0x0709
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#define RT1019_SCC_CTRL_1 0x0800
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#define RT1019_SCC_CTRL_2 0x0801
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#define RT1019_SCC_CTRL_3 0x0802
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#define RT1019_SCC_DUMMY 0x0803
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#define RT1019_SIL_DET_1 0x0900
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#define RT1019_SIL_DET_2 0x0901
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#define RT1019_PWM_DC_DET_1 0x0a00
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#define RT1019_PWM_DC_DET_2 0x0a01
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#define RT1019_PWM_DC_DET_3 0x0a02
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#define RT1019_PWM_DC_DET_4 0x0a03
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#define RT1019_BEEP_1 0x0b00
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#define RT1019_BEEP_2 0x0b01
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#define RT1019_PMC_1 0x0c00
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#define RT1019_PMC_2 0x0c01
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#define RT1019_PMC_3 0x0c02
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#define RT1019_PMC_4 0x0c03
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#define RT1019_PMC_5 0x0c04
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#define RT1019_PMC_6 0x0c05
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#define RT1019_PMC_7 0x0c06
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#define RT1019_PMC_8 0x0c07
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#define RT1019_PMC_9 0x0c08
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#define RT1019_SPKDRC_1 0x0d00
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#define RT1019_SPKDRC_2 0x0d01
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#define RT1019_SPKDRC_3 0x0d02
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#define RT1019_SPKDRC_4 0x0d03
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#define RT1019_SPKDRC_5 0x0d04
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#define RT1019_SPKDRC_6 0x0d05
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#define RT1019_SPKDRC_7 0x0d06
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#define RT1019_HALF_FREQ_1 0x0e00
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#define RT1019_HALF_FREQ_2 0x0e01
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#define RT1019_HALF_FREQ_3 0x0e02
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#define RT1019_HALF_FREQ_4 0x0e03
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#define RT1019_HALF_FREQ_5 0x0e04
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#define RT1019_HALF_FREQ_6 0x0e05
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#define RT1019_HALF_FREQ_7 0x0e06
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#define RT1019_CUR_CTRL_1 0x0f00
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#define RT1019_CUR_CTRL_2 0x0f01
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#define RT1019_CUR_CTRL_3 0x0f02
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#define RT1019_CUR_CTRL_4 0x0f03
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#define RT1019_CUR_CTRL_5 0x0f04
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#define RT1019_CUR_CTRL_6 0x0f05
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#define RT1019_CUR_CTRL_7 0x0f06
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#define RT1019_CUR_CTRL_8 0x0f07
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#define RT1019_CUR_CTRL_9 0x0f08
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#define RT1019_CUR_CTRL_10 0x0f09
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#define RT1019_CUR_CTRL_11 0x0f0a
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#define RT1019_CUR_CTRL_12 0x0f0b
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#define RT1019_CUR_CTRL_13 0x0f0c
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/* 0x0019 Power On Strap Control-2 */
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#define RT1019_AUTO_BITS_SEL_MASK (0x1 << 5)
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#define RT1019_AUTO_BITS_SEL_AUTO (0x1 << 5)
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#define RT1019_AUTO_BITS_SEL_MANU (0x0 << 5)
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#define RT1019_AUTO_CLK_SEL_MASK (0x1 << 4)
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#define RT1019_AUTO_CLK_SEL_AUTO (0x1 << 4)
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#define RT1019_AUTO_CLK_SEL_MANU (0x0 << 4)
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/* 0x0100 Clock Tree Control-1 */
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#define RT1019_CLK_SYS_PRE_SEL_MASK (0x1 << 7)
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#define RT1019_CLK_SYS_PRE_SEL_SFT 7
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#define RT1019_CLK_SYS_PRE_SEL_BCLK (0x0 << 7)
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#define RT1019_CLK_SYS_PRE_SEL_PLL (0x1 << 7)
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#define RT1019_PLL_SRC_MASK (0x1 << 4)
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#define RT1019_PLL_SRC_SFT 4
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#define RT1019_PLL_SRC_SEL_BCLK (0x0 << 4)
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#define RT1019_PLL_SRC_SEL_RC (0x1 << 4)
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#define RT1019_SEL_FIFO_MASK (0x3 << 2)
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#define RT1019_SEL_FIFO_DIV1 (0x0 << 2)
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#define RT1019_SEL_FIFO_DIV2 (0x1 << 2)
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#define RT1019_SEL_FIFO_DIV4 (0x2 << 2)
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/* 0x0101 clock tree control-2 */
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#define RT1019_SYS_DIV_DA_FIL_MASK (0x7 << 5)
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#define RT1019_SYS_DIV_DA_FIL_DIV1 (0x2 << 5)
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#define RT1019_SYS_DIV_DA_FIL_DIV2 (0x3 << 5)
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#define RT1019_SYS_DIV_DA_FIL_DIV4 (0x4 << 5)
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#define RT1019_SYS_DA_OSR_MASK (0x3 << 2)
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#define RT1019_SYS_DA_OSR_DIV1 (0x0 << 2)
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#define RT1019_SYS_DA_OSR_DIV2 (0x1 << 2)
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#define RT1019_SYS_DA_OSR_DIV4 (0x2 << 2)
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#define RT1019_ASRC_256FS_MASK 0x3
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#define RT1019_ASRC_256FS_DIV1 0x0
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#define RT1019_ASRC_256FS_DIV2 0x1
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#define RT1019_ASRC_256FS_DIV4 0x2
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/* 0x0102 clock tree control-3 */
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#define RT1019_SEL_CLK_CAL_MASK (0x3 << 6)
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#define RT1019_SEL_CLK_CAL_DIV1 (0x0 << 6)
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#define RT1019_SEL_CLK_CAL_DIV2 (0x1 << 6)
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#define RT1019_SEL_CLK_CAL_DIV4 (0x2 << 6)
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/* 0x0311 PLL-1 */
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#define RT1019_PLL_M_MASK (0xf << 4)
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#define RT1019_PLL_M_SFT 4
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#define RT1019_PLL_M_BP_MASK (0x1 << 1)
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#define RT1019_PLL_M_BP_SFT 1
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#define RT1019_PLL_Q_8_8_MASK (0x1)
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/* 0x0312 PLL-2 */
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#define RT1019_PLL_Q_7_0_MASK 0xff
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/* 0x0313 PLL-3 */
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#define RT1019_PLL_K_MASK 0x1f
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/* 0x0400 TDM Control-1 */
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#define RT1019_TDM_BCLK_MASK (0x1 << 6)
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#define RT1019_TDM_BCLK_NORM (0x0 << 6)
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#define RT1019_TDM_BCLK_INV (0x1 << 6)
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/* 0x0401 TDM Control-2 */
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#define RT1019_I2S_CH_TX_MASK (0x3 << 6)
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#define RT1019_I2S_CH_TX_SFT 6
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#define RT1019_I2S_TX_2CH (0x0 << 6)
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#define RT1019_I2S_TX_4CH (0x1 << 6)
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#define RT1019_I2S_TX_6CH (0x2 << 6)
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#define RT1019_I2S_TX_8CH (0x3 << 6)
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#define RT1019_I2S_DF_MASK (0x7 << 3)
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#define RT1019_I2S_DF_SFT 3
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#define RT1019_I2S_DF_I2S (0x0 << 3)
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#define RT1019_I2S_DF_LEFT (0x1 << 3)
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#define RT1019_I2S_DF_PCM_A_R (0x2 << 3)
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#define RT1019_I2S_DF_PCM_B_R (0x3 << 3)
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#define RT1019_I2S_DF_PCM_A_F (0x6 << 3)
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#define RT1019_I2S_DF_PCM_B_F (0x7 << 3)
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#define RT1019_I2S_DL_MASK 0x7
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#define RT1019_I2S_DL_SFT 0
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#define RT1019_I2S_DL_16 0x0
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#define RT1019_I2S_DL_20 0x1
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#define RT1019_I2S_DL_24 0x2
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#define RT1019_I2S_DL_32 0x3
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#define RT1019_I2S_DL_8 0x4
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/* TDM1 Control-3 (0x0402) */
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#define RT1019_TDM_I2S_TX_L_DAC1_1_MASK (0x7 << 4)
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#define RT1019_TDM_I2S_TX_R_DAC1_1_MASK 0x7
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#define RT1019_TDM_I2S_TX_L_DAC1_1_SFT 4
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#define RT1019_TDM_I2S_TX_R_DAC1_1_SFT 0
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/* System Clock Source */
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enum {
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RT1019_SCLK_S_BCLK,
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RT1019_SCLK_S_PLL,
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};
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/* PLL1 Source */
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enum {
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RT1019_PLL_S_BCLK,
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RT1019_PLL_S_RC25M,
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};
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enum {
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RT1019_AIF1,
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RT1019_AIFS
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};
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struct rt1019_priv {
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struct snd_soc_component *component;
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struct regmap *regmap;
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int sysclk;
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int sysclk_src;
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int lrck;
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int bclk;
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int pll_src;
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int pll_in;
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int pll_out;
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unsigned int bclk_ratio;
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};
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#endif /* __RT1019_H__ */
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