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Fully unify all of the DMA ops so that subordinate bus types to the DMA operation providers (such as ebus, isa, of_device) can work transparently. Basically, we just make sure that for every system device we create, the dev->archdata 'iommu' and 'stc' fields are filled in. Then we have two platform variants of the DMA ops, one for SUN4U which actually programs the real hardware, and one for SUN4V which makes hypervisor calls. This also fixes the crashes in parport_pc on sparc64, reported by Meelis Roos. Signed-off-by: David S. Miller <davem@davemloft.net>
61 lines
1.6 KiB
C
61 lines
1.6 KiB
C
/* iommu.h: Definitions for the sun5 IOMMU.
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*
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* Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net)
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*/
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#ifndef _SPARC64_IOMMU_H
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#define _SPARC64_IOMMU_H
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/* The format of an iopte in the page tables. */
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#define IOPTE_VALID 0x8000000000000000UL
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#define IOPTE_64K 0x2000000000000000UL
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#define IOPTE_STBUF 0x1000000000000000UL
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#define IOPTE_INTRA 0x0800000000000000UL
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#define IOPTE_CONTEXT 0x07ff800000000000UL
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#define IOPTE_PAGE 0x00007fffffffe000UL
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#define IOPTE_CACHE 0x0000000000000010UL
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#define IOPTE_WRITE 0x0000000000000002UL
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#define IOMMU_NUM_CTXS 4096
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struct iommu_arena {
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unsigned long *map;
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unsigned int hint;
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unsigned int limit;
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};
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struct iommu {
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spinlock_t lock;
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struct iommu_arena arena;
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iopte_t *page_table;
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u32 page_table_map_base;
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unsigned long iommu_control;
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unsigned long iommu_tsbbase;
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unsigned long iommu_flush;
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unsigned long iommu_flushinv;
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unsigned long iommu_tags;
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unsigned long iommu_ctxflush;
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unsigned long write_complete_reg;
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unsigned long dummy_page;
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unsigned long dummy_page_pa;
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unsigned long ctx_lowest_free;
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DECLARE_BITMAP(ctx_bitmap, IOMMU_NUM_CTXS);
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u32 dma_addr_mask;
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};
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struct strbuf {
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int strbuf_enabled;
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unsigned long strbuf_control;
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unsigned long strbuf_pflush;
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unsigned long strbuf_fsync;
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unsigned long strbuf_ctxflush;
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unsigned long strbuf_ctxmatch_base;
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unsigned long strbuf_flushflag_pa;
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volatile unsigned long *strbuf_flushflag;
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volatile unsigned long __flushflag_buf[(64+(64-1)) / sizeof(long)];
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};
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extern int iommu_table_init(struct iommu *iommu, int tsbsize,
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u32 dma_offset, u32 dma_addr_mask);
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#endif /* !(_SPARC64_IOMMU_H) */
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