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612a9aab56
Pull drm merge (part 1) from Dave Airlie: "So first of all my tree and uapi stuff has a conflict mess, its my fault as the nouveau stuff didn't hit -next as were trying to rebase regressions out of it before we merged. Highlights: - SH mobile modesetting driver and associated helpers - some DRM core documentation - i915 modesetting rework, haswell hdmi, haswell and vlv fixes, write combined pte writing, ilk rc6 support, - nouveau: major driver rework into a hw core driver, makes features like SLI a lot saner to implement, - psb: add eDP/DP support for Cedarview - radeon: 2 layer page tables, async VM pte updates, better PLL selection for > 2 screens, better ACPI interactions The rest is general grab bag of fixes. So why part 1? well I have the exynos pull req which came in a bit late but was waiting for me to do something they shouldn't have and it looks fairly safe, and David Howells has some more header cleanups he'd like me to pull, that seem like a good idea, but I'd like to get this merge out of the way so -next dosen't get blocked." Tons of conflicts mostly due to silly include line changes, but mostly mindless. A few other small semantic conflicts too, noted from Dave's pre-merged branch. * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (447 commits) drm/nv98/crypt: fix fuc build with latest envyas drm/nouveau/devinit: fixup various issues with subdev ctor/init ordering drm/nv41/vm: fix and enable use of "real" pciegart drm/nv44/vm: fix and enable use of "real" pciegart drm/nv04/dmaobj: fixup vm target handling in preparation for nv4x pcie drm/nouveau: store supported dma mask in vmmgr drm/nvc0/ibus: initial implementation of subdev drm/nouveau/therm: add support for fan-control modes drm/nouveau/hwmon: rename pwm0* to pmw1* to follow hwmon's rules drm/nouveau/therm: calculate the pwm divisor on nv50+ drm/nouveau/fan: rewrite the fan tachometer driver to get more precision, faster drm/nouveau/therm: move thermal-related functions to the therm subdev drm/nouveau/bios: parse the pwm divisor from the perf table drm/nouveau/therm: use the EXTDEV table to detect i2c monitoring devices drm/nouveau/therm: rework thermal table parsing drm/nouveau/gpio: expose the PWM/TOGGLE parameter found in the gpio vbios table drm/nouveau: fix pm initialization order drm/nouveau/bios: check that fixed tvdac gpio data is valid before using it drm/nouveau: log channel debug/error messages from client object rather than drm client drm/nouveau: have drm debugging macros build on top of core macros ...
425 lines
13 KiB
C
425 lines
13 KiB
C
/**
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* \file radeon_ioc32.c
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*
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* 32-bit ioctl compatibility routines for the Radeon DRM.
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*
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* \author Paul Mackerras <paulus@samba.org>
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*
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* Copyright (C) Paul Mackerras 2005
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <linux/compat.h>
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#include <drm/drmP.h>
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#include <drm/radeon_drm.h>
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#include "radeon_drv.h"
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typedef struct drm_radeon_init32 {
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int func;
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u32 sarea_priv_offset;
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int is_pci;
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int cp_mode;
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int gart_size;
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int ring_size;
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int usec_timeout;
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unsigned int fb_bpp;
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unsigned int front_offset, front_pitch;
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unsigned int back_offset, back_pitch;
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unsigned int depth_bpp;
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unsigned int depth_offset, depth_pitch;
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u32 fb_offset;
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u32 mmio_offset;
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u32 ring_offset;
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u32 ring_rptr_offset;
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u32 buffers_offset;
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u32 gart_textures_offset;
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} drm_radeon_init32_t;
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static int compat_radeon_cp_init(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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drm_radeon_init32_t init32;
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drm_radeon_init_t __user *init;
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if (copy_from_user(&init32, (void __user *)arg, sizeof(init32)))
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return -EFAULT;
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init = compat_alloc_user_space(sizeof(*init));
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if (!access_ok(VERIFY_WRITE, init, sizeof(*init))
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|| __put_user(init32.func, &init->func)
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|| __put_user(init32.sarea_priv_offset, &init->sarea_priv_offset)
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|| __put_user(init32.is_pci, &init->is_pci)
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|| __put_user(init32.cp_mode, &init->cp_mode)
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|| __put_user(init32.gart_size, &init->gart_size)
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|| __put_user(init32.ring_size, &init->ring_size)
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|| __put_user(init32.usec_timeout, &init->usec_timeout)
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|| __put_user(init32.fb_bpp, &init->fb_bpp)
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|| __put_user(init32.front_offset, &init->front_offset)
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|| __put_user(init32.front_pitch, &init->front_pitch)
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|| __put_user(init32.back_offset, &init->back_offset)
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|| __put_user(init32.back_pitch, &init->back_pitch)
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|| __put_user(init32.depth_bpp, &init->depth_bpp)
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|| __put_user(init32.depth_offset, &init->depth_offset)
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|| __put_user(init32.depth_pitch, &init->depth_pitch)
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|| __put_user(init32.fb_offset, &init->fb_offset)
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|| __put_user(init32.mmio_offset, &init->mmio_offset)
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|| __put_user(init32.ring_offset, &init->ring_offset)
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|| __put_user(init32.ring_rptr_offset, &init->ring_rptr_offset)
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|| __put_user(init32.buffers_offset, &init->buffers_offset)
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|| __put_user(init32.gart_textures_offset,
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&init->gart_textures_offset))
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return -EFAULT;
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return drm_ioctl(file, DRM_IOCTL_RADEON_CP_INIT, (unsigned long)init);
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}
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typedef struct drm_radeon_clear32 {
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unsigned int flags;
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unsigned int clear_color;
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unsigned int clear_depth;
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unsigned int color_mask;
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unsigned int depth_mask; /* misnamed field: should be stencil */
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u32 depth_boxes;
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} drm_radeon_clear32_t;
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static int compat_radeon_cp_clear(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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drm_radeon_clear32_t clr32;
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drm_radeon_clear_t __user *clr;
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if (copy_from_user(&clr32, (void __user *)arg, sizeof(clr32)))
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return -EFAULT;
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clr = compat_alloc_user_space(sizeof(*clr));
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if (!access_ok(VERIFY_WRITE, clr, sizeof(*clr))
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|| __put_user(clr32.flags, &clr->flags)
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|| __put_user(clr32.clear_color, &clr->clear_color)
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|| __put_user(clr32.clear_depth, &clr->clear_depth)
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|| __put_user(clr32.color_mask, &clr->color_mask)
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|| __put_user(clr32.depth_mask, &clr->depth_mask)
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|| __put_user((void __user *)(unsigned long)clr32.depth_boxes,
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&clr->depth_boxes))
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return -EFAULT;
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return drm_ioctl(file, DRM_IOCTL_RADEON_CLEAR, (unsigned long)clr);
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}
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typedef struct drm_radeon_stipple32 {
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u32 mask;
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} drm_radeon_stipple32_t;
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static int compat_radeon_cp_stipple(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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drm_radeon_stipple32_t __user *argp = (void __user *)arg;
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drm_radeon_stipple_t __user *request;
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u32 mask;
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if (get_user(mask, &argp->mask))
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return -EFAULT;
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request = compat_alloc_user_space(sizeof(*request));
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if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
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|| __put_user((unsigned int __user *)(unsigned long)mask,
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&request->mask))
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return -EFAULT;
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return drm_ioctl(file, DRM_IOCTL_RADEON_STIPPLE, (unsigned long)request);
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}
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typedef struct drm_radeon_tex_image32 {
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unsigned int x, y; /* Blit coordinates */
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unsigned int width, height;
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u32 data;
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} drm_radeon_tex_image32_t;
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typedef struct drm_radeon_texture32 {
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unsigned int offset;
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int pitch;
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int format;
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int width; /* Texture image coordinates */
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int height;
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u32 image;
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} drm_radeon_texture32_t;
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static int compat_radeon_cp_texture(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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drm_radeon_texture32_t req32;
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drm_radeon_texture_t __user *request;
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drm_radeon_tex_image32_t img32;
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drm_radeon_tex_image_t __user *image;
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if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
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return -EFAULT;
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if (req32.image == 0)
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return -EINVAL;
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if (copy_from_user(&img32, (void __user *)(unsigned long)req32.image,
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sizeof(img32)))
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return -EFAULT;
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request = compat_alloc_user_space(sizeof(*request) + sizeof(*image));
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if (!access_ok(VERIFY_WRITE, request,
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sizeof(*request) + sizeof(*image)))
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return -EFAULT;
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image = (drm_radeon_tex_image_t __user *) (request + 1);
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if (__put_user(req32.offset, &request->offset)
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|| __put_user(req32.pitch, &request->pitch)
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|| __put_user(req32.format, &request->format)
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|| __put_user(req32.width, &request->width)
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|| __put_user(req32.height, &request->height)
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|| __put_user(image, &request->image)
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|| __put_user(img32.x, &image->x)
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|| __put_user(img32.y, &image->y)
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|| __put_user(img32.width, &image->width)
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|| __put_user(img32.height, &image->height)
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|| __put_user((const void __user *)(unsigned long)img32.data,
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&image->data))
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return -EFAULT;
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return drm_ioctl(file, DRM_IOCTL_RADEON_TEXTURE, (unsigned long)request);
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}
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typedef struct drm_radeon_vertex2_32 {
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int idx; /* Index of vertex buffer */
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int discard; /* Client finished with buffer? */
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int nr_states;
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u32 state;
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int nr_prims;
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u32 prim;
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} drm_radeon_vertex2_32_t;
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static int compat_radeon_cp_vertex2(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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drm_radeon_vertex2_32_t req32;
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drm_radeon_vertex2_t __user *request;
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if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
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return -EFAULT;
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request = compat_alloc_user_space(sizeof(*request));
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if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
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|| __put_user(req32.idx, &request->idx)
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|| __put_user(req32.discard, &request->discard)
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|| __put_user(req32.nr_states, &request->nr_states)
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|| __put_user((void __user *)(unsigned long)req32.state,
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&request->state)
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|| __put_user(req32.nr_prims, &request->nr_prims)
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|| __put_user((void __user *)(unsigned long)req32.prim,
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&request->prim))
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return -EFAULT;
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return drm_ioctl(file, DRM_IOCTL_RADEON_VERTEX2, (unsigned long)request);
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}
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typedef struct drm_radeon_cmd_buffer32 {
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int bufsz;
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u32 buf;
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int nbox;
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u32 boxes;
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} drm_radeon_cmd_buffer32_t;
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static int compat_radeon_cp_cmdbuf(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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drm_radeon_cmd_buffer32_t req32;
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drm_radeon_cmd_buffer_t __user *request;
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if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
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return -EFAULT;
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request = compat_alloc_user_space(sizeof(*request));
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if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
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|| __put_user(req32.bufsz, &request->bufsz)
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|| __put_user((void __user *)(unsigned long)req32.buf,
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&request->buf)
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|| __put_user(req32.nbox, &request->nbox)
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|| __put_user((void __user *)(unsigned long)req32.boxes,
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&request->boxes))
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return -EFAULT;
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return drm_ioctl(file, DRM_IOCTL_RADEON_CMDBUF, (unsigned long)request);
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}
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typedef struct drm_radeon_getparam32 {
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int param;
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u32 value;
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} drm_radeon_getparam32_t;
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static int compat_radeon_cp_getparam(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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drm_radeon_getparam32_t req32;
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drm_radeon_getparam_t __user *request;
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if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
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return -EFAULT;
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request = compat_alloc_user_space(sizeof(*request));
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if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
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|| __put_user(req32.param, &request->param)
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|| __put_user((void __user *)(unsigned long)req32.value,
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&request->value))
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return -EFAULT;
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return drm_ioctl(file, DRM_IOCTL_RADEON_GETPARAM, (unsigned long)request);
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}
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typedef struct drm_radeon_mem_alloc32 {
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int region;
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int alignment;
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int size;
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u32 region_offset; /* offset from start of fb or GART */
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} drm_radeon_mem_alloc32_t;
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static int compat_radeon_mem_alloc(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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drm_radeon_mem_alloc32_t req32;
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drm_radeon_mem_alloc_t __user *request;
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if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
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return -EFAULT;
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request = compat_alloc_user_space(sizeof(*request));
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if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
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|| __put_user(req32.region, &request->region)
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|| __put_user(req32.alignment, &request->alignment)
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|| __put_user(req32.size, &request->size)
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|| __put_user((int __user *)(unsigned long)req32.region_offset,
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&request->region_offset))
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return -EFAULT;
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return drm_ioctl(file, DRM_IOCTL_RADEON_ALLOC, (unsigned long)request);
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}
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typedef struct drm_radeon_irq_emit32 {
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u32 irq_seq;
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} drm_radeon_irq_emit32_t;
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static int compat_radeon_irq_emit(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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drm_radeon_irq_emit32_t req32;
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drm_radeon_irq_emit_t __user *request;
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if (copy_from_user(&req32, (void __user *)arg, sizeof(req32)))
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return -EFAULT;
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request = compat_alloc_user_space(sizeof(*request));
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if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
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|| __put_user((int __user *)(unsigned long)req32.irq_seq,
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&request->irq_seq))
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return -EFAULT;
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return drm_ioctl(file, DRM_IOCTL_RADEON_IRQ_EMIT, (unsigned long)request);
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}
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/* The two 64-bit arches where alignof(u64)==4 in 32-bit code */
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#if defined (CONFIG_X86_64) || defined(CONFIG_IA64)
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typedef struct drm_radeon_setparam32 {
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int param;
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u64 value;
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} __attribute__((packed)) drm_radeon_setparam32_t;
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static int compat_radeon_cp_setparam(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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drm_radeon_setparam32_t req32;
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drm_radeon_setparam_t __user *request;
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if (copy_from_user(&req32, (void __user *) arg, sizeof(req32)))
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return -EFAULT;
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request = compat_alloc_user_space(sizeof(*request));
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if (!access_ok(VERIFY_WRITE, request, sizeof(*request))
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|| __put_user(req32.param, &request->param)
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|| __put_user((void __user *)(unsigned long)req32.value,
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&request->value))
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return -EFAULT;
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return drm_ioctl(file, DRM_IOCTL_RADEON_SETPARAM, (unsigned long) request);
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}
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#else
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#define compat_radeon_cp_setparam NULL
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#endif /* X86_64 || IA64 */
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static drm_ioctl_compat_t *radeon_compat_ioctls[] = {
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[DRM_RADEON_CP_INIT] = compat_radeon_cp_init,
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[DRM_RADEON_CLEAR] = compat_radeon_cp_clear,
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[DRM_RADEON_STIPPLE] = compat_radeon_cp_stipple,
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[DRM_RADEON_TEXTURE] = compat_radeon_cp_texture,
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[DRM_RADEON_VERTEX2] = compat_radeon_cp_vertex2,
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[DRM_RADEON_CMDBUF] = compat_radeon_cp_cmdbuf,
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[DRM_RADEON_GETPARAM] = compat_radeon_cp_getparam,
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[DRM_RADEON_SETPARAM] = compat_radeon_cp_setparam,
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[DRM_RADEON_ALLOC] = compat_radeon_mem_alloc,
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[DRM_RADEON_IRQ_EMIT] = compat_radeon_irq_emit,
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};
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/**
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* Called whenever a 32-bit process running under a 64-bit kernel
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* performs an ioctl on /dev/dri/card<n>.
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*
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* \param filp file pointer.
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* \param cmd command.
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* \param arg user argument.
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* \return zero on success or negative number on failure.
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*/
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long radeon_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
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{
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unsigned int nr = DRM_IOCTL_NR(cmd);
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drm_ioctl_compat_t *fn = NULL;
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int ret;
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if (nr < DRM_COMMAND_BASE)
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return drm_compat_ioctl(filp, cmd, arg);
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if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(radeon_compat_ioctls))
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fn = radeon_compat_ioctls[nr - DRM_COMMAND_BASE];
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if (fn != NULL)
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ret = (*fn) (filp, cmd, arg);
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else
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ret = drm_ioctl(filp, cmd, arg);
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return ret;
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}
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long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
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{
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unsigned int nr = DRM_IOCTL_NR(cmd);
|
|
int ret;
|
|
|
|
if (nr < DRM_COMMAND_BASE)
|
|
return drm_compat_ioctl(filp, cmd, arg);
|
|
|
|
ret = drm_ioctl(filp, cmd, arg);
|
|
|
|
return ret;
|
|
}
|