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c5ceea7a28
Adding phy-mode support to cpsw driver and updating the cpsw binding documentation. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
102 lines
3.0 KiB
Plaintext
102 lines
3.0 KiB
Plaintext
TI SoC Ethernet Switch Controller Device Tree Bindings
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------------------------------------------------------
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Required properties:
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- compatible : Should be "ti,cpsw"
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- reg : physical base address and size of the cpsw
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registers map
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- interrupts : property with a value describing the interrupt
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number
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- interrupt-parent : The parent interrupt controller
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- cpdma_channels : Specifies number of channels in CPDMA
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- ale_entries : Specifies No of entries ALE can hold
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- bd_ram_size : Specifies internal descriptor RAM size
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- rx_descs : Specifies number of Rx descriptors
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- mac_control : Specifies Default MAC control register content
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for the specific platform
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- slaves : Specifies number for slaves
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- active_slave : Specifies the slave to use for time stamping,
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ethtool and SIOCGMIIPHY
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- cpts_clock_mult : Numerator to convert input clock ticks into nanoseconds
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- cpts_clock_shift : Denominator to convert input clock ticks into nanoseconds
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Optional properties:
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- ti,hwmods : Must be "cpgmac0"
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- no_bd_ram : Must be 0 or 1
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- dual_emac : Specifies Switch to act as Dual EMAC
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Slave Properties:
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Required properties:
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- phy_id : Specifies slave phy id
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- phy-mode : The interface between the SoC and the PHY (a string
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that of_get_phy_mode() can understand)
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- mac-address : Specifies slave MAC address
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Optional properties:
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- dual_emac_res_vlan : Specifies VID to be used to segregate the ports
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Note: "ti,hwmods" field is used to fetch the base address and irq
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resources from TI, omap hwmod data base during device registration.
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Future plan is to migrate hwmod data base contents into device tree
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blob so that, all the required data will be used from device tree dts
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file.
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Examples:
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mac: ethernet@4A100000 {
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compatible = "ti,cpsw";
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reg = <0x4A100000 0x1000>;
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interrupts = <55 0x4>;
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interrupt-parent = <&intc>;
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cpdma_channels = <8>;
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ale_entries = <1024>;
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bd_ram_size = <0x2000>;
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no_bd_ram = <0>;
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rx_descs = <64>;
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mac_control = <0x20>;
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slaves = <2>;
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active_slave = <0>;
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cpts_clock_mult = <0x80000000>;
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cpts_clock_shift = <29>;
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cpsw_emac0: slave@0 {
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phy_id = <&davinci_mdio>, <0>;
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phy-mode = "rgmii-txid";
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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cpsw_emac1: slave@1 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "rgmii-txid";
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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(or)
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mac: ethernet@4A100000 {
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compatible = "ti,cpsw";
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ti,hwmods = "cpgmac0";
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cpdma_channels = <8>;
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ale_entries = <1024>;
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bd_ram_size = <0x2000>;
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no_bd_ram = <0>;
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rx_descs = <64>;
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mac_control = <0x20>;
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slaves = <2>;
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active_slave = <0>;
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cpts_clock_mult = <0x80000000>;
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cpts_clock_shift = <29>;
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cpsw_emac0: slave@0 {
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phy_id = <&davinci_mdio>, <0>;
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phy-mode = "rgmii-txid";
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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cpsw_emac1: slave@1 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "rgmii-txid";
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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