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6bd03e7113
The new Allwinner H6 SoC contains a USB3 PHY that is wired to the external USB3 pins of the SoC. Add a device tree binding for the PHY. Signed-off-by: Ondrej Jirman <megous@megous.com> Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
48 lines
928 B
YAML
48 lines
928 B
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2019 Ondrej Jirman <megous@megous.com>
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb3-phy.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Allwinner H6 USB3 PHY
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maintainers:
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- Ondrej Jirman <megous@megous.com>
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properties:
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compatible:
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enum:
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- allwinner,sun50i-h6-usb3-phy
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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"#phy-cells":
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const: 0
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required:
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- compatible
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- reg
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- clocks
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- resets
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- "#phy-cells"
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examples:
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- |
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#include <dt-bindings/clock/sun50i-h6-ccu.h>
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#include <dt-bindings/reset/sun50i-h6-ccu.h>
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phy@5210000 {
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compatible = "allwinner,sun50i-h6-usb3-phy";
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reg = <0x5210000 0x10000>;
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clocks = <&ccu CLK_USB_PHY1>;
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resets = <&ccu RST_USB_PHY1>;
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#phy-cells = <0>;
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};
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