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c9eb6172c3
After we removed all the dead wood it turns out only two architectures actually implement dma_cache_sync as a real op: mips and parisc. Add a cache_sync method to struct dma_map_ops and implement it for the mips defualt DMA ops, and the parisc pa11 ops. Note that arm, arc and openrisc support DMA_ATTR_NON_CONSISTENT, but never provided a functional dma_cache_sync implementations, which seems somewhat odd. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
37 lines
855 B
C
37 lines
855 B
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2003 - 2005 Tensilica Inc.
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* Copyright (C) 2015 Cadence Design Systems Inc.
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*/
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#ifndef _XTENSA_DMA_MAPPING_H
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#define _XTENSA_DMA_MAPPING_H
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#include <asm/cache.h>
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#include <asm/io.h>
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#include <linux/mm.h>
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#include <linux/scatterlist.h>
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extern const struct dma_map_ops xtensa_dma_map_ops;
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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return &xtensa_dma_map_ops;
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}
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static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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return (dma_addr_t)paddr;
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}
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static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
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{
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return (phys_addr_t)daddr;
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}
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#endif /* _XTENSA_DMA_MAPPING_H */
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