chen gong 04eb6e773e drm/amdgpu/gfx10: add updated GOLDEN_TSC_COUNT_UPPER/LOWER register offsets for VGH ... The address of the GOLDEN_TSC_COUNT_UPPER/GOLDEN_TSC_COUNT_LOWER for Vnagogh are different from the others. The offset of the GOLDEN_TSC_COUNT_UPPER for Vangogh is 0x0025 by calculation. The offset of the GOLDEN_TSC_COUNT_LOWER for Vangogh is 0x0026 by calculation. Signed-off-by: chen gong <curry.gong@amd.com> Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-01-14 00:24:52 -05:00
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drm	drm/amdgpu/gfx10: add updated GOLDEN_TSC_COUNT_UPPER/LOWER register offsets for VGH	2021-01-14 00:24:52 -05:00
host1x	gpu/host1x: bus: Add missing description for 'driver'	2020-11-05 22:12:55 +01:00
ipu-v3	gpu: ipu-v3: remove unused functions	2020-10-26 10:42:38 +01:00
trace
vga	pci-v5.11-changes	2020-12-15 16:49:59 -08:00
Makefile