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fe0b980ffd
Set 10ms as minimum i2c slave configuration timeout since st_lsm6dsx relies on accel ODR for i2c master clock and at high sample rates (e.g. 833Hz or 416Hz) the slave sensor occasionally may need more cycles than i2c master timeout (2s/833Hz + 1 ~ 3ms) to apply the configuration resulting in an uncomplete slave configuration and a constant reading from the i2c slave connected to st_lsm6dsx i2c master. Fixes: |
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.. | ||
bmi160 | ||
inv_icm42600 | ||
inv_mpu6050 | ||
st_lsm6dsx | ||
adis16400.c | ||
adis16460.c | ||
adis16475.c | ||
adis16480.c | ||
adis_buffer.c | ||
adis_trigger.c | ||
adis.c | ||
fxos8700_core.c | ||
fxos8700_i2c.c | ||
fxos8700_spi.c | ||
fxos8700.h | ||
Kconfig | ||
kmx61.c | ||
Makefile |