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6ba9cdc096
Provision for multiple Rx/Tx queues. Max of 8 WQs and 8 RQs. Max for completion queue is 8+8=16 and max for interrupt resources is 8+8+2. Add driver/firmware interface for setting up RSS secret key and indirection table. Signed-off-by: Scott Feldman <scofeldm@cisco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
391 lines
9.2 KiB
C
391 lines
9.2 KiB
C
/*
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* Copyright 2008 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*
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* This program is free software; you may redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/netdevice.h>
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#include "wq_enet_desc.h"
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#include "rq_enet_desc.h"
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#include "cq_enet_desc.h"
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#include "vnic_resource.h"
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#include "vnic_enet.h"
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#include "vnic_dev.h"
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#include "vnic_wq.h"
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#include "vnic_rq.h"
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#include "vnic_cq.h"
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#include "vnic_intr.h"
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#include "vnic_stats.h"
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#include "vnic_nic.h"
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#include "vnic_rss.h"
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#include "enic_res.h"
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#include "enic.h"
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int enic_get_vnic_config(struct enic *enic)
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{
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struct vnic_enet_config *c = &enic->config;
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int err;
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err = vnic_dev_mac_addr(enic->vdev, enic->mac_addr);
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if (err) {
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printk(KERN_ERR PFX "Error getting MAC addr, %d\n", err);
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return err;
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}
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#define GET_CONFIG(m) \
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do { \
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err = vnic_dev_spec(enic->vdev, \
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offsetof(struct vnic_enet_config, m), \
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sizeof(c->m), &c->m); \
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if (err) { \
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printk(KERN_ERR PFX \
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"Error getting %s, %d\n", #m, err); \
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return err; \
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} \
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} while (0)
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GET_CONFIG(flags);
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GET_CONFIG(wq_desc_count);
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GET_CONFIG(rq_desc_count);
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GET_CONFIG(mtu);
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GET_CONFIG(intr_timer);
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GET_CONFIG(intr_timer_type);
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GET_CONFIG(intr_mode);
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c->wq_desc_count =
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min_t(u32, ENIC_MAX_WQ_DESCS,
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max_t(u32, ENIC_MIN_WQ_DESCS,
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c->wq_desc_count));
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c->wq_desc_count &= 0xfffffff0; /* must be aligned to groups of 16 */
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c->rq_desc_count =
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min_t(u32, ENIC_MAX_RQ_DESCS,
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max_t(u32, ENIC_MIN_RQ_DESCS,
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c->rq_desc_count));
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c->rq_desc_count &= 0xfffffff0; /* must be aligned to groups of 16 */
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if (c->mtu == 0)
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c->mtu = 1500;
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c->mtu = min_t(u16, ENIC_MAX_MTU,
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max_t(u16, ENIC_MIN_MTU,
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c->mtu));
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c->intr_timer = min_t(u16, VNIC_INTR_TIMER_MAX, c->intr_timer);
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printk(KERN_INFO PFX "vNIC MAC addr %pM wq/rq %d/%d\n",
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enic->mac_addr, c->wq_desc_count, c->rq_desc_count);
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printk(KERN_INFO PFX "vNIC mtu %d csum tx/rx %d/%d tso/lro %d/%d "
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"intr timer %d\n",
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c->mtu, ENIC_SETTING(enic, TXCSUM),
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ENIC_SETTING(enic, RXCSUM), ENIC_SETTING(enic, TSO),
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ENIC_SETTING(enic, LRO), c->intr_timer);
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return 0;
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}
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void enic_add_station_addr(struct enic *enic)
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{
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vnic_dev_add_addr(enic->vdev, enic->mac_addr);
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}
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void enic_add_multicast_addr(struct enic *enic, u8 *addr)
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{
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vnic_dev_add_addr(enic->vdev, addr);
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}
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void enic_del_multicast_addr(struct enic *enic, u8 *addr)
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{
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vnic_dev_del_addr(enic->vdev, addr);
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}
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void enic_add_vlan(struct enic *enic, u16 vlanid)
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{
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u64 a0 = vlanid, a1 = 0;
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int wait = 1000;
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int err;
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err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);
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if (err)
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printk(KERN_ERR PFX "Can't add vlan id, %d\n", err);
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}
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void enic_del_vlan(struct enic *enic, u16 vlanid)
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{
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u64 a0 = vlanid, a1 = 0;
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int wait = 1000;
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int err;
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err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);
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if (err)
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printk(KERN_ERR PFX "Can't delete vlan id, %d\n", err);
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}
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int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
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u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
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u8 ig_vlan_strip_en)
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{
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u64 a0, a1;
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u32 nic_cfg;
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int wait = 1000;
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vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
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rss_hash_type, rss_hash_bits, rss_base_cpu,
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rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
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a0 = nic_cfg;
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a1 = 0;
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return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
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}
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int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)
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{
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u64 a0 = (u64)key_pa, a1 = len;
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int wait = 1000;
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return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
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}
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int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)
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{
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u64 a0 = (u64)cpu_pa, a1 = len;
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int wait = 1000;
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return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
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}
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void enic_free_vnic_resources(struct enic *enic)
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{
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unsigned int i;
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for (i = 0; i < enic->wq_count; i++)
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vnic_wq_free(&enic->wq[i]);
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for (i = 0; i < enic->rq_count; i++)
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vnic_rq_free(&enic->rq[i]);
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for (i = 0; i < enic->cq_count; i++)
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vnic_cq_free(&enic->cq[i]);
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for (i = 0; i < enic->intr_count; i++)
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vnic_intr_free(&enic->intr[i]);
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}
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void enic_get_res_counts(struct enic *enic)
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{
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enic->wq_count = min_t(int,
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vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ),
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ENIC_WQ_MAX);
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enic->rq_count = min_t(int,
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vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ),
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ENIC_RQ_MAX);
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enic->cq_count = min_t(int,
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vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ),
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ENIC_CQ_MAX);
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enic->intr_count = min_t(int,
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vnic_dev_get_res_count(enic->vdev, RES_TYPE_INTR_CTRL),
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ENIC_INTR_MAX);
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printk(KERN_INFO PFX "vNIC resources avail: "
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"wq %d rq %d cq %d intr %d\n",
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enic->wq_count, enic->rq_count,
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enic->cq_count, enic->intr_count);
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}
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void enic_init_vnic_resources(struct enic *enic)
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{
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enum vnic_dev_intr_mode intr_mode;
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unsigned int mask_on_assertion;
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unsigned int interrupt_offset;
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unsigned int error_interrupt_enable;
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unsigned int error_interrupt_offset;
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unsigned int cq_index;
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unsigned int i;
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intr_mode = vnic_dev_get_intr_mode(enic->vdev);
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/* Init RQ/WQ resources.
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*
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* RQ[0 - n-1] point to CQ[0 - n-1]
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* WQ[0 - m-1] point to CQ[n - n+m-1]
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*
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* Error interrupt is not enabled for MSI.
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*/
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switch (intr_mode) {
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case VNIC_DEV_INTR_MODE_INTX:
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case VNIC_DEV_INTR_MODE_MSIX:
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error_interrupt_enable = 1;
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error_interrupt_offset = enic->intr_count - 2;
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break;
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default:
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error_interrupt_enable = 0;
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error_interrupt_offset = 0;
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break;
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}
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for (i = 0; i < enic->rq_count; i++) {
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cq_index = i;
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vnic_rq_init(&enic->rq[i],
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cq_index,
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error_interrupt_enable,
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error_interrupt_offset);
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}
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for (i = 0; i < enic->wq_count; i++) {
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cq_index = enic->rq_count + i;
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vnic_wq_init(&enic->wq[i],
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cq_index,
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error_interrupt_enable,
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error_interrupt_offset);
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}
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/* Init CQ resources
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*
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* CQ[0 - n+m-1] point to INTR[0] for INTx, MSI
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* CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X
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*/
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for (i = 0; i < enic->cq_count; i++) {
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switch (intr_mode) {
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case VNIC_DEV_INTR_MODE_MSIX:
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interrupt_offset = i;
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break;
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default:
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interrupt_offset = 0;
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break;
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}
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vnic_cq_init(&enic->cq[i],
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0 /* flow_control_enable */,
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1 /* color_enable */,
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0 /* cq_head */,
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0 /* cq_tail */,
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1 /* cq_tail_color */,
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1 /* interrupt_enable */,
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1 /* cq_entry_enable */,
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0 /* cq_message_enable */,
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interrupt_offset,
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0 /* cq_message_addr */);
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}
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/* Init INTR resources
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*
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* mask_on_assertion is not used for INTx due to the level-
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* triggered nature of INTx
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*/
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switch (intr_mode) {
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case VNIC_DEV_INTR_MODE_MSI:
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case VNIC_DEV_INTR_MODE_MSIX:
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mask_on_assertion = 1;
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break;
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default:
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mask_on_assertion = 0;
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break;
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}
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for (i = 0; i < enic->intr_count; i++) {
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vnic_intr_init(&enic->intr[i],
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enic->config.intr_timer,
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enic->config.intr_timer_type,
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mask_on_assertion);
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}
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/* Clear LIF stats
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*/
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vnic_dev_stats_clear(enic->vdev);
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}
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int enic_alloc_vnic_resources(struct enic *enic)
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{
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enum vnic_dev_intr_mode intr_mode;
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unsigned int i;
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int err;
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intr_mode = vnic_dev_get_intr_mode(enic->vdev);
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printk(KERN_INFO PFX "vNIC resources used: "
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"wq %d rq %d cq %d intr %d intr mode %s\n",
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enic->wq_count, enic->rq_count,
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enic->cq_count, enic->intr_count,
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intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" :
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intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" :
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intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" :
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"unknown"
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);
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/* Allocate queue resources
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*/
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for (i = 0; i < enic->wq_count; i++) {
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err = vnic_wq_alloc(enic->vdev, &enic->wq[i], i,
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enic->config.wq_desc_count,
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sizeof(struct wq_enet_desc));
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if (err)
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goto err_out_cleanup;
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}
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for (i = 0; i < enic->rq_count; i++) {
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err = vnic_rq_alloc(enic->vdev, &enic->rq[i], i,
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enic->config.rq_desc_count,
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sizeof(struct rq_enet_desc));
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if (err)
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goto err_out_cleanup;
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}
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for (i = 0; i < enic->cq_count; i++) {
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if (i < enic->rq_count)
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err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
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enic->config.rq_desc_count,
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sizeof(struct cq_enet_rq_desc));
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else
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err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
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enic->config.wq_desc_count,
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sizeof(struct cq_enet_wq_desc));
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if (err)
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goto err_out_cleanup;
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}
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for (i = 0; i < enic->intr_count; i++) {
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err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i);
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if (err)
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goto err_out_cleanup;
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}
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/* Hook remaining resource
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*/
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enic->legacy_pba = vnic_dev_get_res(enic->vdev,
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RES_TYPE_INTR_PBA_LEGACY, 0);
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if (!enic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) {
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printk(KERN_ERR PFX "Failed to hook legacy pba resource\n");
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err = -ENODEV;
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goto err_out_cleanup;
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}
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return 0;
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err_out_cleanup:
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enic_free_vnic_resources(enic);
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return err;
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}
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