Dave Jiang 4548a6ad3d dmaengine: idxd: move idxd interrupt handling to mask instead of ignore ... Switch driver to use MSIX mask and unmask instead of the ignore bit. When ignore bit is cleared, we must issue an MMIO read to ensure writes have all arrived and check and process any additional completions. The ignore bit does not queue up any pending MSIX interrupts. The mask bit however does. Use API call from interrupt subsystem to mask MSIX interrupt since the hardware does not have convenient mask bit register. Suggested-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/159319517621.70410.11816465052708900506.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>		2020-07-13 14:48:02 +05:30
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cdev.c	dmaengine: idxd: add work queue drain support	2020-07-13 14:48:02 +05:30
device.c	dmaengine: idxd: move idxd interrupt handling to mask instead of ignore	2020-07-13 14:48:02 +05:30
dma.c	dmaengine: cookie bypass for out of order completion	2020-06-17 19:45:14 +05:30
idxd.h	dmaengine: idxd: move idxd interrupt handling to mask instead of ignore	2020-07-13 14:48:02 +05:30
init.c	dmaengine: idxd: add work queue drain support	2020-07-13 14:48:02 +05:30
irq.c	dmaengine: idxd: move idxd interrupt handling to mask instead of ignore	2020-07-13 14:48:02 +05:30
Makefile	dmaengine: idxd: add char driver to expose submission portal to userland	2020-01-24 11:18:45 +05:30
registers.h	dmaengine: idxd: add configuration component of driver	2020-01-24 11:18:45 +05:30
submit.c	dmaengine: idxd: move submission to sbitmap_queue	2020-06-24 12:55:09 +05:30
sysfs.c	dmaengine: idxd: add work queue drain support	2020-07-13 14:48:02 +05:30