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Traditionally, windows were accessed indirectly, through a register selection window that required a global register to be programmed with the index of the window to access. Since the global register could be written from modesetting functions as well as the interrupt handler concurrently, accesses had to be serialized using a lock. Using direct accesses to the window registers the lock can be avoided. Signed-off-by: Thierry Reding <treding@nvidia.com>
82 lines
1.9 KiB
C
82 lines
1.9 KiB
C
/*
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* Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef TEGRA_HUB_H
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#define TEGRA_HUB_H 1
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#include <drm/drmP.h>
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#include <drm/drm_plane.h>
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#include "plane.h"
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struct tegra_dc;
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struct tegra_windowgroup {
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unsigned int usecount;
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struct mutex lock;
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unsigned int index;
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struct device *parent;
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struct reset_control *rst;
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};
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struct tegra_shared_plane {
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struct tegra_plane base;
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struct tegra_windowgroup *wgrp;
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};
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static inline struct tegra_shared_plane *
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to_tegra_shared_plane(struct drm_plane *plane)
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{
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return container_of(plane, struct tegra_shared_plane, base.base);
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}
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struct tegra_display_hub_soc {
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unsigned int num_wgrps;
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};
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struct tegra_display_hub {
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struct host1x_client client;
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struct clk *clk_disp;
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struct clk *clk_dsc;
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struct clk *clk_hub;
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struct reset_control *rst;
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const struct tegra_display_hub_soc *soc;
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struct tegra_windowgroup *wgrps;
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};
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static inline struct tegra_display_hub *
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to_tegra_display_hub(struct host1x_client *client)
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{
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return container_of(client, struct tegra_display_hub, client);
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}
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struct tegra_dc;
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struct tegra_plane;
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int tegra_display_hub_prepare(struct tegra_display_hub *hub);
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void tegra_display_hub_cleanup(struct tegra_display_hub *hub);
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struct drm_plane *tegra_shared_plane_create(struct drm_device *drm,
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struct tegra_dc *dc,
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unsigned int wgrp,
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unsigned int index);
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void tegra_display_hub_atomic_commit(struct drm_device *drm,
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struct drm_atomic_state *state);
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#define DC_CMD_IHUB_COMMON_MISC_CTL 0x068
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#define LATENCY_EVENT (1 << 3)
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#define DC_DISP_IHUB_COMMON_DISPLAY_FETCH_METER 0x451
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#define CURS_SLOTS(x) (((x) & 0xff) << 8)
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#define WGRP_SLOTS(x) (((x) & 0xff) << 0)
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#endif /* TEGRA_HUB_H */
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