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It has been pointed out that naming a subsystem "genpd" isn't very self-explanatory and the acronym itself that means Generic PM Domain, is known only by a limited group of people. In a way to improve the situation, let's rename the subsystem to pmdomain, which ideally should indicate that this is about so called Power Domains or "PM domains" as we often also use within the Linux Kernel terminology. Suggested-by: Rafael J. Wysocki <rafael@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Rafael J. Wysocki <rafael@kernel.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230912221127.487327-1-ulf.hansson@linaro.org
68 lines
2.1 KiB
C
68 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas R-Car M3-W/W+ System Controller
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*
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* Copyright (C) 2016 Glider bvba
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* Copyright (C) 2018-2019 Renesas Electronics Corporation
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*/
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#include <linux/bits.h>
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#include <linux/kernel.h>
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#include <dt-bindings/power/r8a7796-sysc.h>
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#include "rcar-sysc.h"
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static struct rcar_sysc_area r8a7796_areas[] __initdata = {
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{ "always-on", 0, 0, R8A7796_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
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{ "ca57-scu", 0x1c0, 0, R8A7796_PD_CA57_SCU, R8A7796_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca57-cpu0", 0x80, 0, R8A7796_PD_CA57_CPU0, R8A7796_PD_CA57_SCU,
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PD_CPU_NOCR },
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{ "ca57-cpu1", 0x80, 1, R8A7796_PD_CA57_CPU1, R8A7796_PD_CA57_SCU,
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PD_CPU_NOCR },
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{ "ca53-scu", 0x140, 0, R8A7796_PD_CA53_SCU, R8A7796_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca53-cpu0", 0x200, 0, R8A7796_PD_CA53_CPU0, R8A7796_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu1", 0x200, 1, R8A7796_PD_CA53_CPU1, R8A7796_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu2", 0x200, 2, R8A7796_PD_CA53_CPU2, R8A7796_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu3", 0x200, 3, R8A7796_PD_CA53_CPU3, R8A7796_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "cr7", 0x240, 0, R8A7796_PD_CR7, R8A7796_PD_ALWAYS_ON },
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{ "a3vc", 0x380, 0, R8A7796_PD_A3VC, R8A7796_PD_ALWAYS_ON },
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{ "a2vc0", 0x3c0, 0, R8A7796_PD_A2VC0, R8A7796_PD_A3VC },
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{ "a2vc1", 0x3c0, 1, R8A7796_PD_A2VC1, R8A7796_PD_A3VC },
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{ "3dg-a", 0x100, 0, R8A7796_PD_3DG_A, R8A7796_PD_ALWAYS_ON },
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{ "3dg-b", 0x100, 1, R8A7796_PD_3DG_B, R8A7796_PD_3DG_A },
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{ "a3ir", 0x180, 0, R8A7796_PD_A3IR, R8A7796_PD_ALWAYS_ON },
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};
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#ifdef CONFIG_SYSC_R8A77960
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const struct rcar_sysc_info r8a77960_sysc_info __initconst = {
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.areas = r8a7796_areas,
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.num_areas = ARRAY_SIZE(r8a7796_areas),
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};
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#endif /* CONFIG_SYSC_R8A77960 */
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#ifdef CONFIG_SYSC_R8A77961
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static int __init r8a77961_sysc_init(void)
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{
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rcar_sysc_nullify(r8a7796_areas, ARRAY_SIZE(r8a7796_areas),
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R8A7796_PD_A2VC0);
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return 0;
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}
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const struct rcar_sysc_info r8a77961_sysc_info __initconst = {
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.init = r8a77961_sysc_init,
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.areas = r8a7796_areas,
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.num_areas = ARRAY_SIZE(r8a7796_areas),
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.extmask_offs = 0x2f8,
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.extmask_val = BIT(0),
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};
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#endif /* CONFIG_SYSC_R8A77961 */
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