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This patch adds documentation for the TPS6594 PFSM driver. The PFSM controls the operational states of the TPS6594 PMIC. Depending on the operational mode, some power domain networks remain energized while others can be off. Signed-off-by: Julien Panis <jpanis@baylibre.com> Message-ID: <20230511095126.105104-6-jpanis@baylibre.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
88 lines
2.0 KiB
ReStructuredText
88 lines
2.0 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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=====================================
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Texas Instruments TPS6594 PFSM driver
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=====================================
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Author: Julien Panis (jpanis@baylibre.com)
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Overview
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========
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Strictly speaking, PFSM (Pre-configurable Finite State Machine) is not
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hardware. It is a piece of code.
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The TPS6594 PMIC (Power Management IC) integrates a state machine which
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manages operational modes. Depending on the current operational mode,
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some voltage domains remain energized while others can be off.
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The PFSM driver can be used to trigger transitions between configured
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states. It also provides R/W access to the device registers.
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Supported chips
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---------------
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- tps6594-q1
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- tps6593-q1
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- lp8764-q1
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Driver location
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===============
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drivers/misc/tps6594-pfsm.c
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Driver type definitions
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=======================
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include/uapi/linux/tps6594_pfsm.h
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Driver IOCTLs
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=============
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:c:macro::`PMIC_GOTO_STANDBY`
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All device resources are powered down. The processor is off, and
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no voltage domains are energized.
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:c:macro::`PMIC_GOTO_LP_STANDBY`
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The digital and analog functions of the PMIC, which are not
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required to be always-on, are turned off (low-power).
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:c:macro::`PMIC_UPDATE_PGM`
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Triggers a firmware update.
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:c:macro::`PMIC_SET_ACTIVE_STATE`
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One of the operational modes.
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The PMICs are fully functional and supply power to all PDN loads.
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All voltage domains are energized in both MCU and Main processor
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sections.
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:c:macro::`PMIC_SET_MCU_ONLY_STATE`
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One of the operational modes.
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Only the power resources assigned to the MCU Safety Island are on.
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:c:macro::`PMIC_SET_RETENTION_STATE`
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One of the operational modes.
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Depending on the triggers set, some DDR/GPIO voltage domains can
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remain energized, while all other domains are off to minimize
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total system power.
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Driver usage
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============
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See available PFSMs::
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# ls /dev/pfsm*
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Dump the registers of pages 0 and 1::
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# hexdump -C /dev/pfsm-0-0x48
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See PFSM events::
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# cat /proc/interrupts
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Userspace code example
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----------------------
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samples/pfsm/pfsm-wakeup.c
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