mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-05 10:04:12 +08:00
413879a10b
This tag contains the fixes we'd like to target for the 4.16 merge
window. It's not as much as I was originally hoping to do but between
glibc, the chip, and FOSDEM there just wasn't enough time to get
everything put together. As such, this merge window is essentially just
going to be small changes. This includes mostly cleanups:
* A build fix failure to the audit test cases. RISC-V doesn't have
renameat because the generic syscall ABI moved to renameat2 by the
time of our port. The syscall audit test cases don't understand this,
so I added a trivial fix. This went through mailing list review
during the 4.15 merge window, but nobody has picked it up so I think
it's best to just do this here.
* The removal of our command-line argument processing code. The
"mem_end" stuff was broken and the rest duplicated generic device tree
code. The generic code was already being called.
* Some unused/redundant code has been removed, including
__ARCH_HAVE_MMU, current_pgdir, and the initialization of init_mm.pgd.
* SUM is disabled upon taking a trap, which means that user memory is
protected during traps taking inside copy_{to,from}_user().
* The sptbr CSR has been renamed to satp in C code. We haven't changed
the assembly code in order to maintain compatibility with binutils
2.29, which doesn't understand the new name.
Additionally, we're adding some new features:
* Basic ftrace support, thanks to Alan Kao!
* Support for ZONE_DMA32. This is necessary for all the normal reasons,
but also to deal with a deficiency in the Xilinx PCIe controller we're
using on our FPGA-based systems. While the ZONE_DMA32 addition should
be sufficient for most uses, it doesn't complete the fix for the
Xilinx controller.
* TLB shootdowns now only target the harts where they're necessary,
instead of applying to all harts in the system.
These patches have all been sitting on our linux-next branch for a while
now. Due to time constraints this is all I feel comfortable submitting
during the 4.16 merge window, hopefully we'll do better next time!
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Merge tag 'riscv-for-linus-4.16-merge_window' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux
Pull RISC-V updates from Palmer Dabbelt:
"This contains the fixes we'd like to target for the 4.16 merge window.
It's not as much as I was originally hoping to do but between glibc,
the chip, and FOSDEM there just wasn't enough time to get everything
put together. As such, this merge window is essentially just going to
be small changes. This includes mostly cleanups:
- A build fix failure to the audit test cases.
RISC-V doesn't have renameat because the generic syscall ABI moved
to renameat2 by the time of our port. The syscall audit test cases
don't understand this, so I added a trivial fix. This went through
mailing list review during the 4.15 merge window, but nobody has
picked it up so I think it's best to just do this here.
- The removal of our command-line argument processing code. The
"mem_end" stuff was broken and the rest duplicated generic device
tree code. The generic code was already being called.
- Some unused/redundant code has been removed, including
__ARCH_HAVE_MMU, current_pgdir, and the initialization of
init_mm.pgd.
- SUM is disabled upon taking a trap, which means that user memory is
protected during traps taking inside copy_{to,from}_user().
- The sptbr CSR has been renamed to satp in C code. We haven't
changed the assembly code in order to maintain compatibility with
binutils 2.29, which doesn't understand the new name.
Additionally, we're adding some new features:
- Basic ftrace support, thanks to Alan Kao!
- Support for ZONE_DMA32.
This is necessary for all the normal reasons, but also to deal with
a deficiency in the Xilinx PCIe controller we're using on our
FPGA-based systems. While the ZONE_DMA32 addition should be
sufficient for most uses, it doesn't complete the fix for the
Xilinx controller.
- TLB shootdowns now only target the harts where they're necessary,
instead of applying to all harts in the system.
These patches have all been sitting on our linux-next branch for a
while now. Due to time constraints this is all I feel comfortable
submitting during the 4.16 merge window, hopefully we'll do better
next time!"
[ Note to self: "harts" is RISC-V speak for "hardware threads". I had
to look that up. - Linus ]
* tag 'riscv-for-linus-4.16-merge_window' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux:
riscv: inline set_pgdir into its only caller
riscv: rename sptbr to satp
riscv: don't read back satp in paging_init
riscv: remove the unused current_pgdir function
riscv: add ZONE_DMA32
RISC-V: Limit the scope of TLB shootdowns
riscv: disable SUM in the exception handler
riscv: remove redundant unlikely()
riscv: remove unused __ARCH_HAVE_MMU define
riscv/ftrace: Add basic support
RISC-V: Remove mem_end command line processing
RISC-V: Remove duplicate command-line parsing logic
audit: Avoid build failures on systems without renameat
321 lines
6.5 KiB
Plaintext
321 lines
6.5 KiB
Plaintext
#
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# For a description of the syntax of this configuration file,
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# see Documentation/kbuild/kconfig-language.txt.
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#
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config RISCV
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def_bool y
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select OF
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select OF_EARLY_FLATTREE
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select OF_IRQ
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select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
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select ARCH_WANT_FRAME_POINTERS
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select CLONE_BACKWARDS
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select COMMON_CLK
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select GENERIC_CLOCKEVENTS
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select GENERIC_CPU_DEVICES
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select GENERIC_IRQ_SHOW
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select GENERIC_PCI_IOMAP
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select GENERIC_STRNCPY_FROM_USER
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select GENERIC_STRNLEN_USER
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select GENERIC_SMP_IDLE_THREAD
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select GENERIC_ATOMIC64 if !64BIT || !RISCV_ISA_A
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select ARCH_WANT_OPTIONAL_GPIOLIB
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select HAVE_MEMBLOCK
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select HAVE_MEMBLOCK_NODE_MAP
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select HAVE_DMA_API_DEBUG
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select HAVE_DMA_CONTIGUOUS
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select HAVE_GENERIC_DMA_COHERENT
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select IRQ_DOMAIN
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select NO_BOOTMEM
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select RISCV_ISA_A if SMP
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select SPARSE_IRQ
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select SYSCTL_EXCEPTION_TRACE
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select HAVE_ARCH_TRACEHOOK
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select MODULES_USE_ELF_RELA if MODULES
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select THREAD_INFO_IN_TASK
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select RISCV_IRQ_INTC
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select RISCV_TIMER
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config MMU
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def_bool y
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# even on 32-bit, physical (and DMA) addresses are > 32-bits
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config ARCH_PHYS_ADDR_T_64BIT
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def_bool y
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config ZONE_DMA32
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bool
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default y
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config ARCH_DMA_ADDR_T_64BIT
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def_bool y
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config PAGE_OFFSET
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hex
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default 0xC0000000 if 32BIT && MAXPHYSMEM_2GB
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default 0xffffffff80000000 if 64BIT && MAXPHYSMEM_2GB
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default 0xffffffe000000000 if 64BIT && MAXPHYSMEM_128GB
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config STACKTRACE_SUPPORT
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def_bool y
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config TRACE_IRQFLAGS_SUPPORT
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def_bool y
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config RWSEM_GENERIC_SPINLOCK
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def_bool y
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config GENERIC_BUG
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def_bool y
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depends on BUG
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select GENERIC_BUG_RELATIVE_POINTERS if 64BIT
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config GENERIC_BUG_RELATIVE_POINTERS
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bool
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config GENERIC_CALIBRATE_DELAY
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def_bool y
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config GENERIC_CSUM
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def_bool y
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config GENERIC_HWEIGHT
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def_bool y
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config PGTABLE_LEVELS
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int
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default 3 if 64BIT
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default 2
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config HAVE_KPROBES
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def_bool n
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config DMA_DIRECT_OPS
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def_bool y
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menu "Platform type"
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choice
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prompt "Base ISA"
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default ARCH_RV64I
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help
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This selects the base ISA that this kernel will traget and must match
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the target platform.
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config ARCH_RV32I
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bool "RV32I"
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select CPU_SUPPORTS_32BIT_KERNEL
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select 32BIT
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select GENERIC_ASHLDI3
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select GENERIC_ASHRDI3
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select GENERIC_LSHRDI3
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config ARCH_RV64I
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bool "RV64I"
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select CPU_SUPPORTS_64BIT_KERNEL
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select 64BIT
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select HAVE_FUNCTION_TRACER
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select HAVE_FUNCTION_GRAPH_TRACER
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endchoice
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# We must be able to map all physical memory into the kernel, but the compiler
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# is still a bit more efficient when generating code if it's setup in a manner
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# such that it can only map 2GiB of memory.
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choice
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prompt "Kernel Code Model"
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default CMODEL_MEDLOW if 32BIT
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default CMODEL_MEDANY if 64BIT
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config CMODEL_MEDLOW
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bool "medium low code model"
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config CMODEL_MEDANY
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bool "medium any code model"
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endchoice
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choice
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prompt "Maximum Physical Memory"
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default MAXPHYSMEM_2GB if 32BIT
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default MAXPHYSMEM_2GB if 64BIT && CMODEL_MEDLOW
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default MAXPHYSMEM_128GB if 64BIT && CMODEL_MEDANY
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config MAXPHYSMEM_2GB
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bool "2GiB"
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config MAXPHYSMEM_128GB
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depends on 64BIT && CMODEL_MEDANY
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bool "128GiB"
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endchoice
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config SMP
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bool "Symmetric Multi-Processing"
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help
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This enables support for systems with more than one CPU. If
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you say N here, the kernel will run on single and
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multiprocessor machines, but will use only one CPU of a
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multiprocessor machine. If you say Y here, the kernel will run
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on many, but not all, single processor machines. On a single
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processor machine, the kernel will run faster if you say N
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here.
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If you don't know what to do here, say N.
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config NR_CPUS
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int "Maximum number of CPUs (2-32)"
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range 2 32
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depends on SMP
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default "8"
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config CPU_SUPPORTS_32BIT_KERNEL
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bool
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config CPU_SUPPORTS_64BIT_KERNEL
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bool
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choice
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prompt "CPU Tuning"
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default TUNE_GENERIC
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config TUNE_GENERIC
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bool "generic"
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endchoice
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config RISCV_ISA_C
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bool "Emit compressed instructions when building Linux"
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default y
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help
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Adds "C" to the ISA subsets that the toolchain is allowed to emit
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when building Linux, which results in compressed instructions in the
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Linux binary.
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If you don't know what to do here, say Y.
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config RISCV_ISA_A
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def_bool y
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endmenu
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menu "Kernel type"
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choice
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prompt "Kernel code model"
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default 64BIT
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config 32BIT
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bool "32-bit kernel"
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depends on CPU_SUPPORTS_32BIT_KERNEL
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help
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Select this option to build a 32-bit kernel.
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config 64BIT
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bool "64-bit kernel"
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depends on CPU_SUPPORTS_64BIT_KERNEL
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help
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Select this option to build a 64-bit kernel.
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endchoice
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source "mm/Kconfig"
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source "kernel/Kconfig.preempt"
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source "kernel/Kconfig.hz"
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endmenu
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menu "Bus support"
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config PCI
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bool "PCI support"
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select PCI_MSI
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help
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This feature enables support for PCI bus system. If you say Y
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here, the kernel will include drivers and infrastructure code
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to support PCI bus devices.
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If you don't know what to do here, say Y.
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config PCI_DOMAINS
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def_bool PCI
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config PCI_DOMAINS_GENERIC
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def_bool PCI
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source "drivers/pci/Kconfig"
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endmenu
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source "init/Kconfig"
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source "kernel/Kconfig.freezer"
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menu "Executable file formats"
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source "fs/Kconfig.binfmt"
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endmenu
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menu "Power management options"
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source kernel/power/Kconfig
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endmenu
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source "net/Kconfig"
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source "drivers/Kconfig"
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source "fs/Kconfig"
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menu "Kernel hacking"
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config CMDLINE_BOOL
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bool "Built-in kernel command line"
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help
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For most platforms, it is firmware or second stage bootloader
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that by default specifies the kernel command line options.
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However, it might be necessary or advantageous to either override
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the default kernel command line or add a few extra options to it.
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For such cases, this option allows hardcoding command line options
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directly into the kernel.
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For that, choose 'Y' here and fill in the extra boot parameters
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in CONFIG_CMDLINE.
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The built-in options will be concatenated to the default command
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line if CMDLINE_OVERRIDE is set to 'N'. Otherwise, the default
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command line will be ignored and replaced by the built-in string.
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config CMDLINE
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string "Built-in kernel command string"
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depends on CMDLINE_BOOL
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default ""
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help
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Supply command-line options at build time by entering them here.
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config CMDLINE_OVERRIDE
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bool "Built-in command line overrides bootloader arguments"
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depends on CMDLINE_BOOL
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help
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Set this option to 'Y' to have the kernel ignore the bootloader
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or firmware command line. Instead, the built-in command line
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will be used exclusively.
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If you don't know what to do here, say N.
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config EARLY_PRINTK
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def_bool y
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source "lib/Kconfig.debug"
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config CMDLINE_BOOL
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bool
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endmenu
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source "security/Kconfig"
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source "crypto/Kconfig"
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source "lib/Kconfig"
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