Jonathan Marek 02ef80c54e drm/msm/a6xx: update pdc/rscc GMU registers for A640/A650 ... Update the gmu_pdc registers for A640 and A650. Some of the RSCC registers on A650 are in a separate region. Note this also changes the address of these registers: RSCC_TCS1_DRV0_STATUS RSCC_TCS2_DRV0_STATUS RSCC_TCS3_DRV0_STATUS Based on the values in msm-4.14 and msm-4.19 kernels. v3: replaced adreno_is_a650 around ->rscc with checks for "rscc" resource Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>		2020-05-18 09:26:33 -07:00
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drm	drm/msm/a6xx: update pdc/rscc GMU registers for A640/A650	2020-05-18 09:26:33 -07:00
host1x	drm/tegra: Fixes for v5.6-rc1	2020-02-07 12:22:30 +10:00
ipu-v3
trace	gpu/trace: add a gpu total memory usage tracepoint	2020-03-03 17:52:41 -05:00
vga
Makefile	gpu/trace: add a gpu total memory usage tracepoint	2020-03-03 17:52:41 -05:00