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02d7ef6f9d
Fix the asymmetric behavior w.r.t VLAN insertion/stripping for RAW PACKET QPs -- we don't insert on send and need not strip on receive. Signed-off-by: Dotan Barak <dotanb@dev.mellanox.co.il> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: Roland Dreier <roland@purestorage.com> |
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amso1100 | ||
cxgb3 | ||
cxgb4 | ||
ehca | ||
ipath | ||
mlx4 | ||
mthca | ||
nes | ||
ocrdma | ||
qib |