Dmitry Osipenko 029f7e24a6 soc/tegra: regulators: Support core domain state syncing ... The core voltage shall not drop until state of core domain is synced, i.e. all device drivers that use core domain are loaded and ready. Support core domain state syncing. The core domain driver invokes the core-regulator voltage syncing once the state of domain is synced, at this point the core voltage is allowed to go lower than the level left after bootloader. Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30 Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124 Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30 Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>		2021-06-02 10:58:55 +02:00
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fuse	soc/tegra: Changes for v5.11-rc1	2020-11-27 17:56:10 +01:00
common.c	soc/tegra: Add devm_tegra_core_dev_init_opp_table()	2021-06-01 12:14:59 +02:00
flowctrl.c	remove ioremap_nocache and devm_ioremap_nocache	2020-01-06 09:45:59 +01:00
Kconfig	soc/tegra: pmc: Add core power domain	2021-06-02 10:58:42 +02:00
Makefile	soc/tegra: regulators: Add regulators coupler for Tegra30	2019-10-29 14:02:59 +01:00
pmc.c	soc/tegra: pmc: Add driver state syncing	2021-06-02 10:58:55 +02:00
powergate-bpmp.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
regulators-tegra20.c	soc/tegra: regulators: Support core domain state syncing	2021-06-02 10:58:55 +02:00
regulators-tegra30.c	soc/tegra: regulators: Support core domain state syncing	2021-06-02 10:58:55 +02:00