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3b8e21e3c3
* kvm-arm64/psci-suspend: : . : Add support for PSCI SYSTEM_SUSPEND and allow userspace to : filter the wake-up events. : : Patches courtesy of Oliver. : . Documentation: KVM: Fix title level for PSCI_SUSPEND selftests: KVM: Test SYSTEM_SUSPEND PSCI call selftests: KVM: Refactor psci_test to make it amenable to new tests selftests: KVM: Use KVM_SET_MP_STATE to power off vCPU in psci_test selftests: KVM: Create helper for making SMCCC calls selftests: KVM: Rename psci_cpu_on_test to psci_test KVM: arm64: Implement PSCI SYSTEM_SUSPEND KVM: arm64: Add support for userspace to suspend a vCPU KVM: arm64: Return a value from check_vcpu_requests() KVM: arm64: Rename the KVM_REQ_SLEEP handler KVM: arm64: Track vCPU power state using MP state values KVM: arm64: Dedupe vCPU power off helpers KVM: arm64: Don't depend on fallthrough to hide SYSTEM_RESET2 Signed-off-by: Marc Zyngier <maz@kernel.org>
459 lines
12 KiB
C
459 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2012 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*/
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#include <linux/arm-smccc.h>
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#include <linux/preempt.h>
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#include <linux/kvm_host.h>
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#include <linux/uaccess.h>
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#include <linux/wait.h>
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#include <asm/cputype.h>
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#include <asm/kvm_emulate.h>
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#include <kvm/arm_psci.h>
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#include <kvm/arm_hypercalls.h>
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/*
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* This is an implementation of the Power State Coordination Interface
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* as described in ARM document number ARM DEN 0022A.
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*/
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#define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
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static unsigned long psci_affinity_mask(unsigned long affinity_level)
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{
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if (affinity_level <= 3)
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return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);
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return 0;
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}
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static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
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{
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/*
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* NOTE: For simplicity, we make VCPU suspend emulation to be
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* same-as WFI (Wait-for-interrupt) emulation.
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*
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* This means for KVM the wakeup events are interrupts and
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* this is consistent with intended use of StateID as described
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* in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
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*
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* Further, we also treat power-down request to be same as
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* stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
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* specification (ARM DEN 0022A). This means all suspend states
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* for KVM will preserve the register state.
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*/
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kvm_vcpu_wfi(vcpu);
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return PSCI_RET_SUCCESS;
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}
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static inline bool kvm_psci_valid_affinity(struct kvm_vcpu *vcpu,
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unsigned long affinity)
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{
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return !(affinity & ~MPIDR_HWID_BITMASK);
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}
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static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
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{
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struct vcpu_reset_state *reset_state;
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struct kvm *kvm = source_vcpu->kvm;
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struct kvm_vcpu *vcpu = NULL;
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unsigned long cpu_id;
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cpu_id = smccc_get_arg1(source_vcpu);
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if (!kvm_psci_valid_affinity(source_vcpu, cpu_id))
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return PSCI_RET_INVALID_PARAMS;
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vcpu = kvm_mpidr_to_vcpu(kvm, cpu_id);
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/*
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* Make sure the caller requested a valid CPU and that the CPU is
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* turned off.
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*/
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if (!vcpu)
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return PSCI_RET_INVALID_PARAMS;
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if (!kvm_arm_vcpu_stopped(vcpu)) {
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if (kvm_psci_version(source_vcpu) != KVM_ARM_PSCI_0_1)
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return PSCI_RET_ALREADY_ON;
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else
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return PSCI_RET_INVALID_PARAMS;
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}
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reset_state = &vcpu->arch.reset_state;
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reset_state->pc = smccc_get_arg2(source_vcpu);
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/* Propagate caller endianness */
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reset_state->be = kvm_vcpu_is_be(source_vcpu);
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/*
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* NOTE: We always update r0 (or x0) because for PSCI v0.1
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* the general purpose registers are undefined upon CPU_ON.
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*/
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reset_state->r0 = smccc_get_arg3(source_vcpu);
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WRITE_ONCE(reset_state->reset, true);
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kvm_make_request(KVM_REQ_VCPU_RESET, vcpu);
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/*
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* Make sure the reset request is observed if the RUNNABLE mp_state is
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* observed.
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*/
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smp_wmb();
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vcpu->arch.mp_state.mp_state = KVM_MP_STATE_RUNNABLE;
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kvm_vcpu_wake_up(vcpu);
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return PSCI_RET_SUCCESS;
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}
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static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
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{
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int matching_cpus = 0;
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unsigned long i, mpidr;
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unsigned long target_affinity;
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unsigned long target_affinity_mask;
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unsigned long lowest_affinity_level;
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struct kvm *kvm = vcpu->kvm;
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struct kvm_vcpu *tmp;
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target_affinity = smccc_get_arg1(vcpu);
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lowest_affinity_level = smccc_get_arg2(vcpu);
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if (!kvm_psci_valid_affinity(vcpu, target_affinity))
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return PSCI_RET_INVALID_PARAMS;
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/* Determine target affinity mask */
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target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
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if (!target_affinity_mask)
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return PSCI_RET_INVALID_PARAMS;
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/* Ignore other bits of target affinity */
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target_affinity &= target_affinity_mask;
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/*
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* If one or more VCPU matching target affinity are running
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* then ON else OFF
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*/
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kvm_for_each_vcpu(i, tmp, kvm) {
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mpidr = kvm_vcpu_get_mpidr_aff(tmp);
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if ((mpidr & target_affinity_mask) == target_affinity) {
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matching_cpus++;
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if (!kvm_arm_vcpu_stopped(tmp))
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return PSCI_0_2_AFFINITY_LEVEL_ON;
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}
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}
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if (!matching_cpus)
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return PSCI_RET_INVALID_PARAMS;
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return PSCI_0_2_AFFINITY_LEVEL_OFF;
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}
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static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type, u64 flags)
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{
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unsigned long i;
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struct kvm_vcpu *tmp;
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/*
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* The KVM ABI specifies that a system event exit may call KVM_RUN
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* again and may perform shutdown/reboot at a later time that when the
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* actual request is made. Since we are implementing PSCI and a
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* caller of PSCI reboot and shutdown expects that the system shuts
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* down or reboots immediately, let's make sure that VCPUs are not run
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* after this call is handled and before the VCPUs have been
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* re-initialized.
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*/
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kvm_for_each_vcpu(i, tmp, vcpu->kvm)
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tmp->arch.mp_state.mp_state = KVM_MP_STATE_STOPPED;
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kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP);
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memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
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vcpu->run->system_event.type = type;
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vcpu->run->system_event.ndata = 1;
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vcpu->run->system_event.data[0] = flags;
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vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
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}
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static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
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{
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kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN, 0);
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}
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static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
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{
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kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET, 0);
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}
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static void kvm_psci_system_reset2(struct kvm_vcpu *vcpu)
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{
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kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET,
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KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2);
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}
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static void kvm_psci_system_suspend(struct kvm_vcpu *vcpu)
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{
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struct kvm_run *run = vcpu->run;
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memset(&run->system_event, 0, sizeof(vcpu->run->system_event));
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run->system_event.type = KVM_SYSTEM_EVENT_SUSPEND;
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run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
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}
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static void kvm_psci_narrow_to_32bit(struct kvm_vcpu *vcpu)
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{
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int i;
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/*
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* Zero the input registers' upper 32 bits. They will be fully
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* zeroed on exit, so we're fine changing them in place.
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*/
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for (i = 1; i < 4; i++)
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vcpu_set_reg(vcpu, i, lower_32_bits(vcpu_get_reg(vcpu, i)));
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}
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static unsigned long kvm_psci_check_allowed_function(struct kvm_vcpu *vcpu, u32 fn)
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{
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/*
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* Prevent 32 bit guests from calling 64 bit PSCI functions.
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*/
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if ((fn & PSCI_0_2_64BIT) && vcpu_mode_is_32bit(vcpu))
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return PSCI_RET_NOT_SUPPORTED;
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return 0;
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}
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static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = vcpu->kvm;
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u32 psci_fn = smccc_get_function(vcpu);
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unsigned long val;
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int ret = 1;
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switch (psci_fn) {
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case PSCI_0_2_FN_PSCI_VERSION:
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/*
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* Bits[31:16] = Major Version = 0
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* Bits[15:0] = Minor Version = 2
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*/
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val = KVM_ARM_PSCI_0_2;
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break;
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case PSCI_0_2_FN_CPU_SUSPEND:
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case PSCI_0_2_FN64_CPU_SUSPEND:
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val = kvm_psci_vcpu_suspend(vcpu);
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break;
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case PSCI_0_2_FN_CPU_OFF:
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kvm_arm_vcpu_power_off(vcpu);
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val = PSCI_RET_SUCCESS;
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break;
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case PSCI_0_2_FN_CPU_ON:
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kvm_psci_narrow_to_32bit(vcpu);
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fallthrough;
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case PSCI_0_2_FN64_CPU_ON:
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mutex_lock(&kvm->lock);
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val = kvm_psci_vcpu_on(vcpu);
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mutex_unlock(&kvm->lock);
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break;
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case PSCI_0_2_FN_AFFINITY_INFO:
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kvm_psci_narrow_to_32bit(vcpu);
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fallthrough;
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case PSCI_0_2_FN64_AFFINITY_INFO:
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val = kvm_psci_vcpu_affinity_info(vcpu);
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break;
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case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
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/*
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* Trusted OS is MP hence does not require migration
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* or
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* Trusted OS is not present
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*/
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val = PSCI_0_2_TOS_MP;
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break;
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case PSCI_0_2_FN_SYSTEM_OFF:
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kvm_psci_system_off(vcpu);
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/*
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* We shouldn't be going back to guest VCPU after
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* receiving SYSTEM_OFF request.
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*
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* If user space accidentally/deliberately resumes
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* guest VCPU after SYSTEM_OFF request then guest
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* VCPU should see internal failure from PSCI return
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* value. To achieve this, we preload r0 (or x0) with
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* PSCI return value INTERNAL_FAILURE.
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*/
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val = PSCI_RET_INTERNAL_FAILURE;
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ret = 0;
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break;
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case PSCI_0_2_FN_SYSTEM_RESET:
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kvm_psci_system_reset(vcpu);
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/*
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* Same reason as SYSTEM_OFF for preloading r0 (or x0)
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* with PSCI return value INTERNAL_FAILURE.
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*/
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val = PSCI_RET_INTERNAL_FAILURE;
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ret = 0;
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break;
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default:
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val = PSCI_RET_NOT_SUPPORTED;
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break;
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}
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smccc_set_retval(vcpu, val, 0, 0, 0);
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return ret;
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}
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static int kvm_psci_1_x_call(struct kvm_vcpu *vcpu, u32 minor)
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{
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unsigned long val = PSCI_RET_NOT_SUPPORTED;
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u32 psci_fn = smccc_get_function(vcpu);
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struct kvm *kvm = vcpu->kvm;
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u32 arg;
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int ret = 1;
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switch(psci_fn) {
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case PSCI_0_2_FN_PSCI_VERSION:
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val = minor == 0 ? KVM_ARM_PSCI_1_0 : KVM_ARM_PSCI_1_1;
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break;
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case PSCI_1_0_FN_PSCI_FEATURES:
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arg = smccc_get_arg1(vcpu);
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val = kvm_psci_check_allowed_function(vcpu, arg);
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if (val)
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break;
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val = PSCI_RET_NOT_SUPPORTED;
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switch(arg) {
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case PSCI_0_2_FN_PSCI_VERSION:
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case PSCI_0_2_FN_CPU_SUSPEND:
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case PSCI_0_2_FN64_CPU_SUSPEND:
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case PSCI_0_2_FN_CPU_OFF:
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case PSCI_0_2_FN_CPU_ON:
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case PSCI_0_2_FN64_CPU_ON:
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case PSCI_0_2_FN_AFFINITY_INFO:
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case PSCI_0_2_FN64_AFFINITY_INFO:
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case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
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case PSCI_0_2_FN_SYSTEM_OFF:
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case PSCI_0_2_FN_SYSTEM_RESET:
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case PSCI_1_0_FN_PSCI_FEATURES:
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case ARM_SMCCC_VERSION_FUNC_ID:
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val = 0;
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break;
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case PSCI_1_0_FN_SYSTEM_SUSPEND:
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case PSCI_1_0_FN64_SYSTEM_SUSPEND:
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if (test_bit(KVM_ARCH_FLAG_SYSTEM_SUSPEND_ENABLED, &kvm->arch.flags))
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val = 0;
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break;
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case PSCI_1_1_FN_SYSTEM_RESET2:
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case PSCI_1_1_FN64_SYSTEM_RESET2:
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if (minor >= 1)
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val = 0;
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break;
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}
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break;
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case PSCI_1_0_FN_SYSTEM_SUSPEND:
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kvm_psci_narrow_to_32bit(vcpu);
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fallthrough;
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case PSCI_1_0_FN64_SYSTEM_SUSPEND:
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/*
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* Return directly to userspace without changing the vCPU's
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* registers. Userspace depends on reading the SMCCC parameters
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* to implement SYSTEM_SUSPEND.
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*/
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if (test_bit(KVM_ARCH_FLAG_SYSTEM_SUSPEND_ENABLED, &kvm->arch.flags)) {
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kvm_psci_system_suspend(vcpu);
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return 0;
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}
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break;
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case PSCI_1_1_FN_SYSTEM_RESET2:
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kvm_psci_narrow_to_32bit(vcpu);
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fallthrough;
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case PSCI_1_1_FN64_SYSTEM_RESET2:
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if (minor >= 1) {
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arg = smccc_get_arg1(vcpu);
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if (arg <= PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET ||
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arg >= PSCI_1_1_RESET_TYPE_VENDOR_START) {
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kvm_psci_system_reset2(vcpu);
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vcpu_set_reg(vcpu, 0, PSCI_RET_INTERNAL_FAILURE);
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return 0;
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}
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val = PSCI_RET_INVALID_PARAMS;
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break;
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}
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break;
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default:
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return kvm_psci_0_2_call(vcpu);
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}
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smccc_set_retval(vcpu, val, 0, 0, 0);
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return ret;
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}
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static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = vcpu->kvm;
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u32 psci_fn = smccc_get_function(vcpu);
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unsigned long val;
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switch (psci_fn) {
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case KVM_PSCI_FN_CPU_OFF:
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kvm_arm_vcpu_power_off(vcpu);
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val = PSCI_RET_SUCCESS;
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break;
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case KVM_PSCI_FN_CPU_ON:
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mutex_lock(&kvm->lock);
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val = kvm_psci_vcpu_on(vcpu);
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mutex_unlock(&kvm->lock);
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break;
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default:
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val = PSCI_RET_NOT_SUPPORTED;
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break;
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}
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smccc_set_retval(vcpu, val, 0, 0, 0);
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return 1;
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}
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/**
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* kvm_psci_call - handle PSCI call if r0 value is in range
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* @vcpu: Pointer to the VCPU struct
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*
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* Handle PSCI calls from guests through traps from HVC instructions.
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* The calling convention is similar to SMC calls to the secure world
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* where the function number is placed in r0.
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*
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* This function returns: > 0 (success), 0 (success but exit to user
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* space), and < 0 (errors)
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*
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* Errors:
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* -EINVAL: Unrecognized PSCI function
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*/
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int kvm_psci_call(struct kvm_vcpu *vcpu)
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{
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u32 psci_fn = smccc_get_function(vcpu);
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unsigned long val;
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val = kvm_psci_check_allowed_function(vcpu, psci_fn);
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if (val) {
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smccc_set_retval(vcpu, val, 0, 0, 0);
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return 1;
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}
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switch (kvm_psci_version(vcpu)) {
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case KVM_ARM_PSCI_1_1:
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return kvm_psci_1_x_call(vcpu, 1);
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case KVM_ARM_PSCI_1_0:
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return kvm_psci_1_x_call(vcpu, 0);
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case KVM_ARM_PSCI_0_2:
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return kvm_psci_0_2_call(vcpu);
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case KVM_ARM_PSCI_0_1:
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return kvm_psci_0_1_call(vcpu);
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default:
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return -EINVAL;
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}
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}
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