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5019f0b134
The register and irq definitions in mach/*.h for spear3xx and spear6xx are now mostly obsolete, after the platforms have been converted to device tree based probing and the data is now part of the device tree files. The misc_regs.h contents are moved into clock.c because that is the only user, aside from the DMA_CHN_CFG that should eventually get handled differently. Some of the contents of mach/spear.h still remain, because they are used to set up the static map table, timer, uart and auxdata tables, but almost everything got removed. We might remove everything but the map table as the DT conversion completes, but that is not a priority. I've also made sure to make both copies of spear.h more or less identical so we can eventually combine them. The spear3?0.h files were only used by the spear3?0.c files, so I merged the contents in there and removed the bits that were unused. This is something that should still be looked at. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Viresh Kumar <viresh.kumar@st.com>
623 lines
15 KiB
C
623 lines
15 KiB
C
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/pci_regs.h>
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#include <linux/string.h>
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/* Max address size we deal with */
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#define OF_MAX_ADDR_CELLS 4
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#define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \
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(ns) > 0)
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static struct of_bus *of_match_bus(struct device_node *np);
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static int __of_address_to_resource(struct device_node *dev,
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const __be32 *addrp, u64 size, unsigned int flags,
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const char *name, struct resource *r);
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/* Debug utility */
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#ifdef DEBUG
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static void of_dump_addr(const char *s, const __be32 *addr, int na)
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{
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printk(KERN_DEBUG "%s", s);
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while (na--)
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printk(" %08x", be32_to_cpu(*(addr++)));
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printk("\n");
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}
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#else
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static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
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#endif
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/* Callbacks for bus specific translators */
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struct of_bus {
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const char *name;
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const char *addresses;
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int (*match)(struct device_node *parent);
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void (*count_cells)(struct device_node *child,
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int *addrc, int *sizec);
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u64 (*map)(u32 *addr, const __be32 *range,
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int na, int ns, int pna);
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int (*translate)(u32 *addr, u64 offset, int na);
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unsigned int (*get_flags)(const __be32 *addr);
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};
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/*
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* Default translator (generic bus)
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*/
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static void of_bus_default_count_cells(struct device_node *dev,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = of_n_addr_cells(dev);
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if (sizec)
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*sizec = of_n_size_cells(dev);
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}
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static u64 of_bus_default_map(u32 *addr, const __be32 *range,
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int na, int ns, int pna)
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{
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u64 cp, s, da;
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cp = of_read_number(range, na);
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s = of_read_number(range + na + pna, ns);
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da = of_read_number(addr, na);
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pr_debug("OF: default map, cp=%llx, s=%llx, da=%llx\n",
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(unsigned long long)cp, (unsigned long long)s,
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(unsigned long long)da);
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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static int of_bus_default_translate(u32 *addr, u64 offset, int na)
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{
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u64 a = of_read_number(addr, na);
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memset(addr, 0, na * 4);
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a += offset;
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if (na > 1)
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addr[na - 2] = cpu_to_be32(a >> 32);
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addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
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return 0;
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}
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static unsigned int of_bus_default_get_flags(const __be32 *addr)
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{
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return IORESOURCE_MEM;
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}
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#ifdef CONFIG_PCI
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/*
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* PCI bus specific translator
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*/
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static int of_bus_pci_match(struct device_node *np)
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{
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/* "vci" is for the /chaos bridge on 1st-gen PCI powermacs */
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return !strcmp(np->type, "pci") || !strcmp(np->type, "vci");
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}
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static void of_bus_pci_count_cells(struct device_node *np,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = 3;
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if (sizec)
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*sizec = 2;
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}
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static unsigned int of_bus_pci_get_flags(const __be32 *addr)
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{
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unsigned int flags = 0;
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u32 w = be32_to_cpup(addr);
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switch((w >> 24) & 0x03) {
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case 0x01:
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flags |= IORESOURCE_IO;
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break;
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case 0x02: /* 32 bits */
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case 0x03: /* 64 bits */
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flags |= IORESOURCE_MEM;
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break;
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}
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if (w & 0x40000000)
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flags |= IORESOURCE_PREFETCH;
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return flags;
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}
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static u64 of_bus_pci_map(u32 *addr, const __be32 *range, int na, int ns,
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int pna)
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{
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u64 cp, s, da;
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unsigned int af, rf;
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af = of_bus_pci_get_flags(addr);
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rf = of_bus_pci_get_flags(range);
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/* Check address type match */
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if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
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return OF_BAD_ADDR;
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/* Read address values, skipping high cell */
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cp = of_read_number(range + 1, na - 1);
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s = of_read_number(range + na + pna, ns);
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da = of_read_number(addr + 1, na - 1);
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pr_debug("OF: PCI map, cp=%llx, s=%llx, da=%llx\n",
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(unsigned long long)cp, (unsigned long long)s,
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(unsigned long long)da);
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
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{
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return of_bus_default_translate(addr + 1, offset, na - 1);
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}
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const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
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unsigned int *flags)
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{
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const __be32 *prop;
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unsigned int psize;
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struct device_node *parent;
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struct of_bus *bus;
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int onesize, i, na, ns;
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/* Get parent & match bus type */
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parent = of_get_parent(dev);
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if (parent == NULL)
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return NULL;
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bus = of_match_bus(parent);
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if (strcmp(bus->name, "pci")) {
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of_node_put(parent);
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return NULL;
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}
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bus->count_cells(dev, &na, &ns);
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of_node_put(parent);
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if (!OF_CHECK_COUNTS(na, ns))
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return NULL;
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/* Get "reg" or "assigned-addresses" property */
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prop = of_get_property(dev, bus->addresses, &psize);
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if (prop == NULL)
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return NULL;
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psize /= 4;
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onesize = na + ns;
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for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
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u32 val = be32_to_cpu(prop[0]);
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if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
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if (size)
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*size = of_read_number(prop + na, ns);
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if (flags)
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*flags = bus->get_flags(prop);
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return prop;
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}
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}
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return NULL;
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}
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EXPORT_SYMBOL(of_get_pci_address);
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int of_pci_address_to_resource(struct device_node *dev, int bar,
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struct resource *r)
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{
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const __be32 *addrp;
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u64 size;
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unsigned int flags;
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addrp = of_get_pci_address(dev, bar, &size, &flags);
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if (addrp == NULL)
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return -EINVAL;
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return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
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}
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EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
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#endif /* CONFIG_PCI */
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/*
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* ISA bus specific translator
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*/
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static int of_bus_isa_match(struct device_node *np)
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{
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return !strcmp(np->name, "isa");
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}
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static void of_bus_isa_count_cells(struct device_node *child,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = 2;
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if (sizec)
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*sizec = 1;
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}
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static u64 of_bus_isa_map(u32 *addr, const __be32 *range, int na, int ns,
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int pna)
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{
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u64 cp, s, da;
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/* Check address type match */
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if ((addr[0] ^ range[0]) & cpu_to_be32(1))
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return OF_BAD_ADDR;
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/* Read address values, skipping high cell */
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cp = of_read_number(range + 1, na - 1);
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s = of_read_number(range + na + pna, ns);
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da = of_read_number(addr + 1, na - 1);
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pr_debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n",
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(unsigned long long)cp, (unsigned long long)s,
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(unsigned long long)da);
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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static int of_bus_isa_translate(u32 *addr, u64 offset, int na)
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{
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return of_bus_default_translate(addr + 1, offset, na - 1);
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}
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static unsigned int of_bus_isa_get_flags(const __be32 *addr)
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{
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unsigned int flags = 0;
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u32 w = be32_to_cpup(addr);
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if (w & 1)
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flags |= IORESOURCE_IO;
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else
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flags |= IORESOURCE_MEM;
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return flags;
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}
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/*
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* Array of bus specific translators
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*/
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static struct of_bus of_busses[] = {
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#ifdef CONFIG_PCI
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/* PCI */
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{
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.name = "pci",
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.addresses = "assigned-addresses",
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.match = of_bus_pci_match,
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.count_cells = of_bus_pci_count_cells,
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.map = of_bus_pci_map,
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.translate = of_bus_pci_translate,
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.get_flags = of_bus_pci_get_flags,
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},
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#endif /* CONFIG_PCI */
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/* ISA */
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{
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.name = "isa",
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.addresses = "reg",
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.match = of_bus_isa_match,
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.count_cells = of_bus_isa_count_cells,
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.map = of_bus_isa_map,
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.translate = of_bus_isa_translate,
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.get_flags = of_bus_isa_get_flags,
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},
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/* Default */
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{
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.name = "default",
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.addresses = "reg",
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.match = NULL,
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.count_cells = of_bus_default_count_cells,
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.map = of_bus_default_map,
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.translate = of_bus_default_translate,
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.get_flags = of_bus_default_get_flags,
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},
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};
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static struct of_bus *of_match_bus(struct device_node *np)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(of_busses); i++)
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if (!of_busses[i].match || of_busses[i].match(np))
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return &of_busses[i];
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BUG();
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return NULL;
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}
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static int of_translate_one(struct device_node *parent, struct of_bus *bus,
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struct of_bus *pbus, u32 *addr,
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int na, int ns, int pna, const char *rprop)
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{
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const __be32 *ranges;
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unsigned int rlen;
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int rone;
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u64 offset = OF_BAD_ADDR;
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/* Normally, an absence of a "ranges" property means we are
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* crossing a non-translatable boundary, and thus the addresses
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* below the current not cannot be converted to CPU physical ones.
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* Unfortunately, while this is very clear in the spec, it's not
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* what Apple understood, and they do have things like /uni-n or
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* /ht nodes with no "ranges" property and a lot of perfectly
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* useable mapped devices below them. Thus we treat the absence of
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* "ranges" as equivalent to an empty "ranges" property which means
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* a 1:1 translation at that level. It's up to the caller not to try
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* to translate addresses that aren't supposed to be translated in
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* the first place. --BenH.
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*
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* As far as we know, this damage only exists on Apple machines, so
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* This code is only enabled on powerpc. --gcl
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*/
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ranges = of_get_property(parent, rprop, &rlen);
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#if !defined(CONFIG_PPC)
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if (ranges == NULL) {
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pr_err("OF: no ranges; cannot translate\n");
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return 1;
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}
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#endif /* !defined(CONFIG_PPC) */
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if (ranges == NULL || rlen == 0) {
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offset = of_read_number(addr, na);
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memset(addr, 0, pna * 4);
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pr_debug("OF: empty ranges; 1:1 translation\n");
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goto finish;
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}
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pr_debug("OF: walking ranges...\n");
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/* Now walk through the ranges */
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rlen /= 4;
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rone = na + pna + ns;
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for (; rlen >= rone; rlen -= rone, ranges += rone) {
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offset = bus->map(addr, ranges, na, ns, pna);
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if (offset != OF_BAD_ADDR)
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break;
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}
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if (offset == OF_BAD_ADDR) {
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pr_debug("OF: not found !\n");
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return 1;
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}
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memcpy(addr, ranges + na, 4 * pna);
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finish:
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of_dump_addr("OF: parent translation for:", addr, pna);
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pr_debug("OF: with offset: %llx\n", (unsigned long long)offset);
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/* Translate it into parent bus space */
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return pbus->translate(addr, offset, pna);
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}
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/*
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* Translate an address from the device-tree into a CPU physical address,
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* this walks up the tree and applies the various bus mappings on the
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* way.
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*
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* Note: We consider that crossing any level with #size-cells == 0 to mean
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* that translation is impossible (that is we are not dealing with a value
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* that can be mapped to a cpu physical address). This is not really specified
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* that way, but this is traditionally the way IBM at least do things
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*/
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u64 __of_translate_address(struct device_node *dev, const __be32 *in_addr,
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const char *rprop)
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{
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struct device_node *parent = NULL;
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struct of_bus *bus, *pbus;
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u32 addr[OF_MAX_ADDR_CELLS];
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int na, ns, pna, pns;
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u64 result = OF_BAD_ADDR;
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pr_debug("OF: ** translation for device %s **\n", dev->full_name);
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/* Increase refcount at current level */
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of_node_get(dev);
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/* Get parent & match bus type */
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parent = of_get_parent(dev);
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if (parent == NULL)
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goto bail;
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bus = of_match_bus(parent);
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/* Cound address cells & copy address locally */
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bus->count_cells(dev, &na, &ns);
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if (!OF_CHECK_COUNTS(na, ns)) {
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printk(KERN_ERR "prom_parse: Bad cell count for %s\n",
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dev->full_name);
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goto bail;
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}
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memcpy(addr, in_addr, na * 4);
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pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n",
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bus->name, na, ns, parent->full_name);
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of_dump_addr("OF: translating address:", addr, na);
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/* Translate */
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for (;;) {
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/* Switch to parent bus */
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of_node_put(dev);
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dev = parent;
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parent = of_get_parent(dev);
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/* If root, we have finished */
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if (parent == NULL) {
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pr_debug("OF: reached root node\n");
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result = of_read_number(addr, na);
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break;
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}
|
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|
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/* Get new parent bus and counts */
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pbus = of_match_bus(parent);
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pbus->count_cells(dev, &pna, &pns);
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if (!OF_CHECK_COUNTS(pna, pns)) {
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printk(KERN_ERR "prom_parse: Bad cell count for %s\n",
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dev->full_name);
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break;
|
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}
|
|
|
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pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n",
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pbus->name, pna, pns, parent->full_name);
|
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|
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/* Apply bus translation */
|
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if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
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break;
|
|
|
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/* Complete the move up one level */
|
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na = pna;
|
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ns = pns;
|
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bus = pbus;
|
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|
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of_dump_addr("OF: one level translation:", addr, na);
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}
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bail:
|
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of_node_put(parent);
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of_node_put(dev);
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|
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return result;
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}
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|
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u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
|
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{
|
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return __of_translate_address(dev, in_addr, "ranges");
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}
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EXPORT_SYMBOL(of_translate_address);
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|
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u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
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{
|
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return __of_translate_address(dev, in_addr, "dma-ranges");
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}
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EXPORT_SYMBOL(of_translate_dma_address);
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|
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const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
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unsigned int *flags)
|
|
{
|
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const __be32 *prop;
|
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unsigned int psize;
|
|
struct device_node *parent;
|
|
struct of_bus *bus;
|
|
int onesize, i, na, ns;
|
|
|
|
/* Get parent & match bus type */
|
|
parent = of_get_parent(dev);
|
|
if (parent == NULL)
|
|
return NULL;
|
|
bus = of_match_bus(parent);
|
|
bus->count_cells(dev, &na, &ns);
|
|
of_node_put(parent);
|
|
if (!OF_CHECK_COUNTS(na, ns))
|
|
return NULL;
|
|
|
|
/* Get "reg" or "assigned-addresses" property */
|
|
prop = of_get_property(dev, bus->addresses, &psize);
|
|
if (prop == NULL)
|
|
return NULL;
|
|
psize /= 4;
|
|
|
|
onesize = na + ns;
|
|
for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
|
|
if (i == index) {
|
|
if (size)
|
|
*size = of_read_number(prop + na, ns);
|
|
if (flags)
|
|
*flags = bus->get_flags(prop);
|
|
return prop;
|
|
}
|
|
return NULL;
|
|
}
|
|
EXPORT_SYMBOL(of_get_address);
|
|
|
|
static int __of_address_to_resource(struct device_node *dev,
|
|
const __be32 *addrp, u64 size, unsigned int flags,
|
|
const char *name, struct resource *r)
|
|
{
|
|
u64 taddr;
|
|
|
|
if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
|
|
return -EINVAL;
|
|
taddr = of_translate_address(dev, addrp);
|
|
if (taddr == OF_BAD_ADDR)
|
|
return -EINVAL;
|
|
memset(r, 0, sizeof(struct resource));
|
|
if (flags & IORESOURCE_IO) {
|
|
unsigned long port;
|
|
port = pci_address_to_pio(taddr);
|
|
if (port == (unsigned long)-1)
|
|
return -EINVAL;
|
|
r->start = port;
|
|
r->end = port + size - 1;
|
|
} else {
|
|
r->start = taddr;
|
|
r->end = taddr + size - 1;
|
|
}
|
|
r->flags = flags;
|
|
r->name = name ? name : dev->full_name;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* of_address_to_resource - Translate device tree address and return as resource
|
|
*
|
|
* Note that if your address is a PIO address, the conversion will fail if
|
|
* the physical address can't be internally converted to an IO token with
|
|
* pci_address_to_pio(), that is because it's either called to early or it
|
|
* can't be matched to any host bridge IO space
|
|
*/
|
|
int of_address_to_resource(struct device_node *dev, int index,
|
|
struct resource *r)
|
|
{
|
|
const __be32 *addrp;
|
|
u64 size;
|
|
unsigned int flags;
|
|
const char *name = NULL;
|
|
|
|
addrp = of_get_address(dev, index, &size, &flags);
|
|
if (addrp == NULL)
|
|
return -EINVAL;
|
|
|
|
/* Get optional "reg-names" property to add a name to a resource */
|
|
of_property_read_string_index(dev, "reg-names", index, &name);
|
|
|
|
return __of_address_to_resource(dev, addrp, size, flags, name, r);
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_address_to_resource);
|
|
|
|
struct device_node *of_find_matching_node_by_address(struct device_node *from,
|
|
const struct of_device_id *matches,
|
|
u64 base_address)
|
|
{
|
|
struct device_node *dn = of_find_matching_node(from, matches);
|
|
struct resource res;
|
|
|
|
while (dn) {
|
|
if (of_address_to_resource(dn, 0, &res))
|
|
continue;
|
|
if (res.start == base_address)
|
|
return dn;
|
|
dn = of_find_matching_node(dn, matches);
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
|
|
/**
|
|
* of_iomap - Maps the memory mapped IO for a given device_node
|
|
* @device: the device whose io range will be mapped
|
|
* @index: index of the io range
|
|
*
|
|
* Returns a pointer to the mapped memory
|
|
*/
|
|
void __iomem *of_iomap(struct device_node *np, int index)
|
|
{
|
|
struct resource res;
|
|
|
|
if (of_address_to_resource(np, index, &res))
|
|
return NULL;
|
|
|
|
return ioremap(res.start, resource_size(&res));
|
|
}
|
|
EXPORT_SYMBOL(of_iomap);
|