mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
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dfd437a257
- arm64 support for syscall emulation via PTRACE_SYSEMU{,_SINGLESTEP} - Wire up VM_FLUSH_RESET_PERMS for arm64, allowing the core code to manage the permissions of executable vmalloc regions more strictly - Slight performance improvement by keeping softirqs enabled while touching the FPSIMD/SVE state (kernel_neon_begin/end) - Expose a couple of ARMv8.5 features to user (HWCAP): CondM (new XAFLAG and AXFLAG instructions for floating point comparison flags manipulation) and FRINT (rounding floating point numbers to integers) - Re-instate ARM64_PSEUDO_NMI support which was previously marked as BROKEN due to some bugs (now fixed) - Improve parking of stopped CPUs and implement an arm64-specific panic_smp_self_stop() to avoid warning on not being able to stop secondary CPUs during panic - perf: enable the ARM Statistical Profiling Extensions (SPE) on ACPI platforms - perf: DDR performance monitor support for iMX8QXP - cache_line_size() can now be set from DT or ACPI/PPTT if provided to cope with a system cache info not exposed via the CPUID registers - Avoid warning on hardware cache line size greater than ARCH_DMA_MINALIGN if the system is fully coherent - arm64 do_page_fault() and hugetlb cleanups - Refactor set_pte_at() to avoid redundant READ_ONCE(*ptep) - Ignore ACPI 5.1 FADTs reported as 5.0 (infer from the 'arm_boot_flags' introduced in 5.1) - CONFIG_RANDOMIZE_BASE now enabled in defconfig - Allow the selection of ARM64_MODULE_PLTS, currently only done via RANDOMIZE_BASE (and an erratum workaround), allowing modules to spill over into the vmalloc area - Make ZONE_DMA32 configurable -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAl0eHqcACgkQa9axLQDI XvFyNA/+L+bnkz8m3ncydlqqfXomQn4eJJVQ8Uksb0knJz+1+3CUxxbO4ry4jXZN fMkbggYrDPRKpDbsUl0lsRipj7jW9bqan+N37c3SWqCkgb6HqDaHViwxdx6Ec/Uk gHudozDSPh/8c7hxGcSyt/CFyuW6b+8eYIQU5rtIgz8aVY2BypBvS/7YtYCbIkx0 w4CFleRTK1zXD5mJQhrc6jyDx659sVkrAvdhf6YIymOY8nBTv40vwdNo3beJMYp8 Po/+0Ixu+VkHUNtmYYZQgP/AGH96xiTcRnUqd172JdtRPpCLqnLqwFokXeVIlUKT KZFMDPzK+756Ayn4z4huEePPAOGlHbJje8JVNnFyreKhVVcCotW7YPY/oJR10bnc eo7yD+DxABTn+93G2yP436bNVa8qO1UqjOBfInWBtnNFJfANIkZweij/MQ6MjaTA o7KtviHnZFClefMPoiI7HDzwL8XSmsBDbeQ04s2Wxku1Y2xUHLx4iLmadwLQ1ZPb lZMTZP3N/T1554MoURVA1afCjAwiqU3bt1xDUGjbBVjLfSPBAn/25IacsG9Li9AF 7Rp1M9VhrfLftjFFkB2HwpbhRASOxaOSx+EI3kzEfCtM2O9I1WHgP3rvCdc3l0HU tbK0/IggQicNgz7GSZ8xDlWPwwSadXYGLys+xlMZEYd3pDIOiFc= =0TDT -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: - arm64 support for syscall emulation via PTRACE_SYSEMU{,_SINGLESTEP} - Wire up VM_FLUSH_RESET_PERMS for arm64, allowing the core code to manage the permissions of executable vmalloc regions more strictly - Slight performance improvement by keeping softirqs enabled while touching the FPSIMD/SVE state (kernel_neon_begin/end) - Expose a couple of ARMv8.5 features to user (HWCAP): CondM (new XAFLAG and AXFLAG instructions for floating point comparison flags manipulation) and FRINT (rounding floating point numbers to integers) - Re-instate ARM64_PSEUDO_NMI support which was previously marked as BROKEN due to some bugs (now fixed) - Improve parking of stopped CPUs and implement an arm64-specific panic_smp_self_stop() to avoid warning on not being able to stop secondary CPUs during panic - perf: enable the ARM Statistical Profiling Extensions (SPE) on ACPI platforms - perf: DDR performance monitor support for iMX8QXP - cache_line_size() can now be set from DT or ACPI/PPTT if provided to cope with a system cache info not exposed via the CPUID registers - Avoid warning on hardware cache line size greater than ARCH_DMA_MINALIGN if the system is fully coherent - arm64 do_page_fault() and hugetlb cleanups - Refactor set_pte_at() to avoid redundant READ_ONCE(*ptep) - Ignore ACPI 5.1 FADTs reported as 5.0 (infer from the 'arm_boot_flags' introduced in 5.1) - CONFIG_RANDOMIZE_BASE now enabled in defconfig - Allow the selection of ARM64_MODULE_PLTS, currently only done via RANDOMIZE_BASE (and an erratum workaround), allowing modules to spill over into the vmalloc area - Make ZONE_DMA32 configurable * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (54 commits) perf: arm_spe: Enable ACPI/Platform automatic module loading arm_pmu: acpi: spe: Add initial MADT/SPE probing ACPI/PPTT: Add function to return ACPI 6.3 Identical tokens ACPI/PPTT: Modify node flag detection to find last IDENTICAL x86/entry: Simplify _TIF_SYSCALL_EMU handling arm64: rename dump_instr as dump_kernel_instr arm64/mm: Drop [PTE|PMD]_TYPE_FAULT arm64: Implement panic_smp_self_stop() arm64: Improve parking of stopped CPUs arm64: Expose FRINT capabilities to userspace arm64: Expose ARMv8.5 CondM capability to userspace arm64: defconfig: enable CONFIG_RANDOMIZE_BASE arm64: ARM64_MODULES_PLTS must depend on MODULES arm64: bpf: do not allocate executable memory arm64/kprobes: set VM_FLUSH_RESET_PERMS on kprobe instruction pages arm64/mm: wire up CONFIG_ARCH_HAS_SET_DIRECT_MAP arm64: module: create module allocations without exec permissions arm64: Allow user selection of ARM64_MODULE_PLTS acpi/arm64: ignore 5.1 FADTs that are reported as 5.0 arm64: Allow selecting Pseudo-NMI again ...
436 lines
12 KiB
C
436 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* common.c - C code for kernel entry and exit
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* Copyright (c) 2015 Andrew Lutomirski
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*
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* Based on asm and ptrace code by many authors. The code here originated
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* in ptrace.c and signal.c.
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/sched/task_stack.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/errno.h>
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#include <linux/ptrace.h>
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#include <linux/tracehook.h>
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#include <linux/audit.h>
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#include <linux/seccomp.h>
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#include <linux/signal.h>
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#include <linux/export.h>
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#include <linux/context_tracking.h>
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#include <linux/user-return-notifier.h>
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#include <linux/nospec.h>
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#include <linux/uprobes.h>
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#include <linux/livepatch.h>
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#include <linux/syscalls.h>
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#include <linux/uaccess.h>
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#include <asm/desc.h>
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#include <asm/traps.h>
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#include <asm/vdso.h>
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#include <asm/cpufeature.h>
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#include <asm/fpu/api.h>
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#include <asm/nospec-branch.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/syscalls.h>
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#ifdef CONFIG_CONTEXT_TRACKING
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/* Called on entry from user mode with IRQs off. */
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__visible inline void enter_from_user_mode(void)
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{
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CT_WARN_ON(ct_state() != CONTEXT_USER);
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user_exit_irqoff();
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}
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#else
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static inline void enter_from_user_mode(void) {}
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#endif
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static void do_audit_syscall_entry(struct pt_regs *regs, u32 arch)
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{
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#ifdef CONFIG_X86_64
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if (arch == AUDIT_ARCH_X86_64) {
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audit_syscall_entry(regs->orig_ax, regs->di,
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regs->si, regs->dx, regs->r10);
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} else
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#endif
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{
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audit_syscall_entry(regs->orig_ax, regs->bx,
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regs->cx, regs->dx, regs->si);
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}
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}
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/*
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* Returns the syscall nr to run (which should match regs->orig_ax) or -1
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* to skip the syscall.
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*/
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static long syscall_trace_enter(struct pt_regs *regs)
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{
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u32 arch = in_ia32_syscall() ? AUDIT_ARCH_I386 : AUDIT_ARCH_X86_64;
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struct thread_info *ti = current_thread_info();
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unsigned long ret = 0;
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u32 work;
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if (IS_ENABLED(CONFIG_DEBUG_ENTRY))
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BUG_ON(regs != task_pt_regs(current));
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work = READ_ONCE(ti->flags);
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if (work & (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_EMU)) {
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ret = tracehook_report_syscall_entry(regs);
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if (ret || (work & _TIF_SYSCALL_EMU))
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return -1L;
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}
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#ifdef CONFIG_SECCOMP
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/*
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* Do seccomp after ptrace, to catch any tracer changes.
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*/
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if (work & _TIF_SECCOMP) {
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struct seccomp_data sd;
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sd.arch = arch;
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sd.nr = regs->orig_ax;
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sd.instruction_pointer = regs->ip;
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#ifdef CONFIG_X86_64
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if (arch == AUDIT_ARCH_X86_64) {
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sd.args[0] = regs->di;
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sd.args[1] = regs->si;
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sd.args[2] = regs->dx;
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sd.args[3] = regs->r10;
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sd.args[4] = regs->r8;
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sd.args[5] = regs->r9;
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} else
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#endif
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{
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sd.args[0] = regs->bx;
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sd.args[1] = regs->cx;
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sd.args[2] = regs->dx;
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sd.args[3] = regs->si;
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sd.args[4] = regs->di;
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sd.args[5] = regs->bp;
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}
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ret = __secure_computing(&sd);
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if (ret == -1)
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return ret;
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}
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#endif
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if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
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trace_sys_enter(regs, regs->orig_ax);
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do_audit_syscall_entry(regs, arch);
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return ret ?: regs->orig_ax;
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}
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#define EXIT_TO_USERMODE_LOOP_FLAGS \
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(_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_UPROBE | \
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_TIF_NEED_RESCHED | _TIF_USER_RETURN_NOTIFY | _TIF_PATCH_PENDING)
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static void exit_to_usermode_loop(struct pt_regs *regs, u32 cached_flags)
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{
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/*
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* In order to return to user mode, we need to have IRQs off with
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* none of EXIT_TO_USERMODE_LOOP_FLAGS set. Several of these flags
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* can be set at any time on preemptible kernels if we have IRQs on,
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* so we need to loop. Disabling preemption wouldn't help: doing the
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* work to clear some of the flags can sleep.
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*/
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while (true) {
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/* We have work to do. */
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local_irq_enable();
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if (cached_flags & _TIF_NEED_RESCHED)
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schedule();
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if (cached_flags & _TIF_UPROBE)
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uprobe_notify_resume(regs);
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if (cached_flags & _TIF_PATCH_PENDING)
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klp_update_patch_state(current);
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/* deal with pending signal delivery */
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if (cached_flags & _TIF_SIGPENDING)
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do_signal(regs);
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if (cached_flags & _TIF_NOTIFY_RESUME) {
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clear_thread_flag(TIF_NOTIFY_RESUME);
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tracehook_notify_resume(regs);
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rseq_handle_notify_resume(NULL, regs);
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}
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if (cached_flags & _TIF_USER_RETURN_NOTIFY)
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fire_user_return_notifiers();
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/* Disable IRQs and retry */
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local_irq_disable();
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cached_flags = READ_ONCE(current_thread_info()->flags);
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if (!(cached_flags & EXIT_TO_USERMODE_LOOP_FLAGS))
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break;
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}
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}
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/* Called with IRQs disabled. */
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__visible inline void prepare_exit_to_usermode(struct pt_regs *regs)
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{
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struct thread_info *ti = current_thread_info();
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u32 cached_flags;
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addr_limit_user_check();
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lockdep_assert_irqs_disabled();
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lockdep_sys_exit();
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cached_flags = READ_ONCE(ti->flags);
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if (unlikely(cached_flags & EXIT_TO_USERMODE_LOOP_FLAGS))
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exit_to_usermode_loop(regs, cached_flags);
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/* Reload ti->flags; we may have rescheduled above. */
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cached_flags = READ_ONCE(ti->flags);
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fpregs_assert_state_consistent();
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if (unlikely(cached_flags & _TIF_NEED_FPU_LOAD))
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switch_fpu_return();
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#ifdef CONFIG_COMPAT
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/*
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* Compat syscalls set TS_COMPAT. Make sure we clear it before
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* returning to user mode. We need to clear it *after* signal
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* handling, because syscall restart has a fixup for compat
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* syscalls. The fixup is exercised by the ptrace_syscall_32
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* selftest.
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*
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* We also need to clear TS_REGS_POKED_I386: the 32-bit tracer
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* special case only applies after poking regs and before the
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* very next return to user mode.
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*/
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ti->status &= ~(TS_COMPAT|TS_I386_REGS_POKED);
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#endif
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user_enter_irqoff();
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mds_user_clear_cpu_buffers();
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}
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#define SYSCALL_EXIT_WORK_FLAGS \
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(_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \
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_TIF_SINGLESTEP | _TIF_SYSCALL_TRACEPOINT)
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static void syscall_slow_exit_work(struct pt_regs *regs, u32 cached_flags)
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{
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bool step;
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audit_syscall_exit(regs);
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if (cached_flags & _TIF_SYSCALL_TRACEPOINT)
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trace_sys_exit(regs, regs->ax);
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/*
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* If TIF_SYSCALL_EMU is set, we only get here because of
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* TIF_SINGLESTEP (i.e. this is PTRACE_SYSEMU_SINGLESTEP).
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* We already reported this syscall instruction in
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* syscall_trace_enter().
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*/
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step = unlikely(
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(cached_flags & (_TIF_SINGLESTEP | _TIF_SYSCALL_EMU))
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== _TIF_SINGLESTEP);
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if (step || cached_flags & _TIF_SYSCALL_TRACE)
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tracehook_report_syscall_exit(regs, step);
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}
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/*
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* Called with IRQs on and fully valid regs. Returns with IRQs off in a
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* state such that we can immediately switch to user mode.
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*/
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__visible inline void syscall_return_slowpath(struct pt_regs *regs)
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{
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struct thread_info *ti = current_thread_info();
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u32 cached_flags = READ_ONCE(ti->flags);
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CT_WARN_ON(ct_state() != CONTEXT_KERNEL);
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if (IS_ENABLED(CONFIG_PROVE_LOCKING) &&
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WARN(irqs_disabled(), "syscall %ld left IRQs disabled", regs->orig_ax))
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local_irq_enable();
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rseq_syscall(regs);
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/*
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* First do one-time work. If these work items are enabled, we
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* want to run them exactly once per syscall exit with IRQs on.
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*/
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if (unlikely(cached_flags & SYSCALL_EXIT_WORK_FLAGS))
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syscall_slow_exit_work(regs, cached_flags);
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local_irq_disable();
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prepare_exit_to_usermode(regs);
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}
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#ifdef CONFIG_X86_64
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__visible void do_syscall_64(unsigned long nr, struct pt_regs *regs)
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{
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struct thread_info *ti;
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enter_from_user_mode();
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local_irq_enable();
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ti = current_thread_info();
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if (READ_ONCE(ti->flags) & _TIF_WORK_SYSCALL_ENTRY)
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nr = syscall_trace_enter(regs);
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/*
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* NB: Native and x32 syscalls are dispatched from the same
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* table. The only functional difference is the x32 bit in
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* regs->orig_ax, which changes the behavior of some syscalls.
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*/
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nr &= __SYSCALL_MASK;
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if (likely(nr < NR_syscalls)) {
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nr = array_index_nospec(nr, NR_syscalls);
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regs->ax = sys_call_table[nr](regs);
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}
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syscall_return_slowpath(regs);
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}
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#endif
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#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)
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/*
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* Does a 32-bit syscall. Called with IRQs on in CONTEXT_KERNEL. Does
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* all entry and exit work and returns with IRQs off. This function is
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* extremely hot in workloads that use it, and it's usually called from
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* do_fast_syscall_32, so forcibly inline it to improve performance.
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*/
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static __always_inline void do_syscall_32_irqs_on(struct pt_regs *regs)
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{
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struct thread_info *ti = current_thread_info();
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unsigned int nr = (unsigned int)regs->orig_ax;
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#ifdef CONFIG_IA32_EMULATION
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ti->status |= TS_COMPAT;
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#endif
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if (READ_ONCE(ti->flags) & _TIF_WORK_SYSCALL_ENTRY) {
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/*
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* Subtlety here: if ptrace pokes something larger than
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* 2^32-1 into orig_ax, this truncates it. This may or
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* may not be necessary, but it matches the old asm
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* behavior.
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*/
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nr = syscall_trace_enter(regs);
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}
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if (likely(nr < IA32_NR_syscalls)) {
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nr = array_index_nospec(nr, IA32_NR_syscalls);
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#ifdef CONFIG_IA32_EMULATION
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regs->ax = ia32_sys_call_table[nr](regs);
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#else
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/*
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* It's possible that a 32-bit syscall implementation
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* takes a 64-bit parameter but nonetheless assumes that
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* the high bits are zero. Make sure we zero-extend all
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* of the args.
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*/
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regs->ax = ia32_sys_call_table[nr](
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(unsigned int)regs->bx, (unsigned int)regs->cx,
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(unsigned int)regs->dx, (unsigned int)regs->si,
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(unsigned int)regs->di, (unsigned int)regs->bp);
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#endif /* CONFIG_IA32_EMULATION */
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}
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syscall_return_slowpath(regs);
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}
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/* Handles int $0x80 */
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__visible void do_int80_syscall_32(struct pt_regs *regs)
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{
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enter_from_user_mode();
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local_irq_enable();
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do_syscall_32_irqs_on(regs);
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}
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/* Returns 0 to return using IRET or 1 to return using SYSEXIT/SYSRETL. */
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__visible long do_fast_syscall_32(struct pt_regs *regs)
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{
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/*
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* Called using the internal vDSO SYSENTER/SYSCALL32 calling
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* convention. Adjust regs so it looks like we entered using int80.
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*/
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unsigned long landing_pad = (unsigned long)current->mm->context.vdso +
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vdso_image_32.sym_int80_landing_pad;
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/*
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* SYSENTER loses EIP, and even SYSCALL32 needs us to skip forward
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* so that 'regs->ip -= 2' lands back on an int $0x80 instruction.
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* Fix it up.
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*/
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regs->ip = landing_pad;
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enter_from_user_mode();
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local_irq_enable();
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/* Fetch EBP from where the vDSO stashed it. */
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if (
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#ifdef CONFIG_X86_64
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/*
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* Micro-optimization: the pointer we're following is explicitly
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* 32 bits, so it can't be out of range.
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*/
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__get_user(*(u32 *)®s->bp,
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(u32 __user __force *)(unsigned long)(u32)regs->sp)
|
|
#else
|
|
get_user(*(u32 *)®s->bp,
|
|
(u32 __user __force *)(unsigned long)(u32)regs->sp)
|
|
#endif
|
|
) {
|
|
|
|
/* User code screwed up. */
|
|
local_irq_disable();
|
|
regs->ax = -EFAULT;
|
|
prepare_exit_to_usermode(regs);
|
|
return 0; /* Keep it simple: use IRET. */
|
|
}
|
|
|
|
/* Now this is just like a normal syscall. */
|
|
do_syscall_32_irqs_on(regs);
|
|
|
|
#ifdef CONFIG_X86_64
|
|
/*
|
|
* Opportunistic SYSRETL: if possible, try to return using SYSRETL.
|
|
* SYSRETL is available on all 64-bit CPUs, so we don't need to
|
|
* bother with SYSEXIT.
|
|
*
|
|
* Unlike 64-bit opportunistic SYSRET, we can't check that CX == IP,
|
|
* because the ECX fixup above will ensure that this is essentially
|
|
* never the case.
|
|
*/
|
|
return regs->cs == __USER32_CS && regs->ss == __USER_DS &&
|
|
regs->ip == landing_pad &&
|
|
(regs->flags & (X86_EFLAGS_RF | X86_EFLAGS_TF)) == 0;
|
|
#else
|
|
/*
|
|
* Opportunistic SYSEXIT: if possible, try to return using SYSEXIT.
|
|
*
|
|
* Unlike 64-bit opportunistic SYSRET, we can't check that CX == IP,
|
|
* because the ECX fixup above will ensure that this is essentially
|
|
* never the case.
|
|
*
|
|
* We don't allow syscalls at all from VM86 mode, but we still
|
|
* need to check VM, because we might be returning from sys_vm86.
|
|
*/
|
|
return static_cpu_has(X86_FEATURE_SEP) &&
|
|
regs->cs == __USER_CS && regs->ss == __USER_DS &&
|
|
regs->ip == landing_pad &&
|
|
(regs->flags & (X86_EFLAGS_RF | X86_EFLAGS_TF | X86_EFLAGS_VM)) == 0;
|
|
#endif
|
|
}
|
|
#endif
|