Rodrigo Vivi 01d06e9f96 drm/i915: Only flush fbc on sw when fbc is enabled. ... Avoid touching fbc register when fbc is disabled. Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2014-09-19 14:43:23 +02:00
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drm	drm/i915: Only flush fbc on sw when fbc is enabled.	2014-09-19 14:43:23 +02:00
host1x	drm/tegra: Make job submission 64-bit safe	2014-08-04 10:07:36 +02:00
ipu-v3	gpu: ipu-v3: Add ipu_dump()	2014-09-02 14:55:56 +02:00
vga	vgaarb: We can own non-decoded resources	2014-07-08 11:15:09 +10:00
Makefile	gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging	2014-06-04 11:06:52 +02:00