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7b8f16c2d1
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
655 lines
15 KiB
C
655 lines
15 KiB
C
/*
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* Intel MID Resistive Touch Screen Driver
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*
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* Copyright (C) 2008 Intel Corp
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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*
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* Questions/Comments/Bug fixes to Sreedhara (sreedhara.ds@intel.com)
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* Ramesh Agarwal (ramesh.agarwal@intel.com)
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* TODO:
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* review conversion of r/m/w sequences
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*/
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#include <linux/module.h>
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#include <linux/input.h>
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#include <linux/interrupt.h>
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#include <linux/err.h>
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#include <linux/param.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <asm/intel_scu_ipc.h>
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#include <linux/device.h>
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/* PMIC Interrupt registers */
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#define PMIC_REG_ID1 0x00 /* PMIC ID1 register */
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/* PMIC Interrupt registers */
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#define PMIC_REG_INT 0x04 /* PMIC interrupt register */
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#define PMIC_REG_MINT 0x05 /* PMIC interrupt mask register */
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/* ADC Interrupt registers */
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#define PMIC_REG_ADCINT 0x5F /* ADC interrupt register */
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#define PMIC_REG_MADCINT 0x60 /* ADC interrupt mask register */
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/* ADC Control registers */
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#define PMIC_REG_ADCCNTL1 0x61 /* ADC control register */
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/* ADC Channel Selection registers */
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#define PMICADDR0 0xA4
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#define END_OF_CHANNEL 0x1F
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/* ADC Result register */
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#define PMIC_REG_ADCSNS0H 0x64
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/* ADC channels for touch screen */
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#define MRST_TS_CHAN10 0xA /* Touch screen X+ connection */
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#define MRST_TS_CHAN11 0xB /* Touch screen X- connection */
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#define MRST_TS_CHAN12 0xC /* Touch screen Y+ connection */
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#define MRST_TS_CHAN13 0xD /* Touch screen Y- connection */
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/* Touch screen channel BIAS constants */
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#define MRST_XBIAS 0x20
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#define MRST_YBIAS 0x40
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#define MRST_ZBIAS 0x80
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/* Touch screen coordinates */
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#define MRST_X_MIN 10
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#define MRST_X_MAX 1024
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#define MRST_X_FUZZ 5
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#define MRST_Y_MIN 10
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#define MRST_Y_MAX 1024
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#define MRST_Y_FUZZ 5
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#define MRST_PRESSURE_MIN 0
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#define MRST_PRESSURE_NOMINAL 50
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#define MRST_PRESSURE_MAX 100
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#define WAIT_ADC_COMPLETION 10 /* msec */
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/* PMIC ADC round robin delays */
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#define ADC_LOOP_DELAY0 0x0 /* Continuous loop */
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#define ADC_LOOP_DELAY1 0x1 /* 4.5 ms approximate */
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/* PMIC Vendor Identifiers */
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#define PMIC_VENDOR_FS 0 /* PMIC vendor FreeScale */
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#define PMIC_VENDOR_MAXIM 1 /* PMIC vendor MAXIM */
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#define PMIC_VENDOR_NEC 2 /* PMIC vendor NEC */
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#define MRSTOUCH_MAX_CHANNELS 32 /* Maximum ADC channels */
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/* Touch screen device structure */
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struct mrstouch_dev {
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struct device *dev; /* device associated with touch screen */
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struct input_dev *input;
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char phys[32];
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u16 asr; /* Address selection register */
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int irq;
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unsigned int vendor; /* PMIC vendor */
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unsigned int rev; /* PMIC revision */
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int (*read_prepare)(struct mrstouch_dev *tsdev);
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int (*read)(struct mrstouch_dev *tsdev, u16 *x, u16 *y, u16 *z);
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int (*read_finish)(struct mrstouch_dev *tsdev);
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};
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/*************************** NEC and Maxim Interface ************************/
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static int mrstouch_nec_adc_read_prepare(struct mrstouch_dev *tsdev)
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{
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return intel_scu_ipc_update_register(PMIC_REG_MADCINT, 0, 0x20);
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}
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/*
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* Enables PENDET interrupt.
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*/
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static int mrstouch_nec_adc_read_finish(struct mrstouch_dev *tsdev)
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{
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int err;
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err = intel_scu_ipc_update_register(PMIC_REG_MADCINT, 0x20, 0x20);
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if (!err)
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err = intel_scu_ipc_update_register(PMIC_REG_ADCCNTL1, 0, 0x05);
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return err;
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}
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/*
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* Reads PMIC ADC touch screen result
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* Reads ADC storage registers for higher 7 and lower 3 bits and
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* converts the two readings into a single value and turns off gain bit
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*/
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static int mrstouch_ts_chan_read(u16 offset, u16 chan, u16 *vp, u16 *vm)
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{
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int err;
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u16 result;
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u32 res;
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result = PMIC_REG_ADCSNS0H + offset;
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if (chan == MRST_TS_CHAN12)
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result += 4;
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err = intel_scu_ipc_ioread32(result, &res);
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if (err)
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return err;
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/* Mash the bits up */
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*vp = (res & 0xFF) << 3; /* Highest 7 bits */
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*vp |= (res >> 8) & 0x07; /* Lower 3 bits */
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*vp &= 0x3FF;
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res >>= 16;
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*vm = (res & 0xFF) << 3; /* Highest 7 bits */
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*vm |= (res >> 8) & 0x07; /* Lower 3 bits */
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*vm &= 0x3FF;
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return 0;
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}
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/*
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* Enables X, Y and Z bias values
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* Enables YPYM for X channels and XPXM for Y channels
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*/
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static int mrstouch_ts_bias_set(uint offset, uint bias)
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{
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int count;
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u16 chan, start;
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u16 reg[4];
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u8 data[4];
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chan = PMICADDR0 + offset;
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start = MRST_TS_CHAN10;
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for (count = 0; count <= 3; count++) {
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reg[count] = chan++;
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data[count] = bias | (start + count);
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}
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return intel_scu_ipc_writev(reg, data, 4);
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}
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/* To read touch screen channel values */
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static int mrstouch_nec_adc_read(struct mrstouch_dev *tsdev,
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u16 *x, u16 *y, u16 *z)
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{
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int err;
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u16 xm, ym, zm;
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/* configure Y bias for X channels */
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err = mrstouch_ts_bias_set(tsdev->asr, MRST_YBIAS);
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if (err)
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goto ipc_error;
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msleep(WAIT_ADC_COMPLETION);
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/* read x+ and x- channels */
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err = mrstouch_ts_chan_read(tsdev->asr, MRST_TS_CHAN10, x, &xm);
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if (err)
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goto ipc_error;
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/* configure x bias for y channels */
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err = mrstouch_ts_bias_set(tsdev->asr, MRST_XBIAS);
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if (err)
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goto ipc_error;
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msleep(WAIT_ADC_COMPLETION);
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/* read y+ and y- channels */
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err = mrstouch_ts_chan_read(tsdev->asr, MRST_TS_CHAN12, y, &ym);
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if (err)
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goto ipc_error;
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/* configure z bias for x and y channels */
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err = mrstouch_ts_bias_set(tsdev->asr, MRST_ZBIAS);
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if (err)
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goto ipc_error;
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msleep(WAIT_ADC_COMPLETION);
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/* read z+ and z- channels */
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err = mrstouch_ts_chan_read(tsdev->asr, MRST_TS_CHAN10, z, &zm);
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if (err)
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goto ipc_error;
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return 0;
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ipc_error:
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dev_err(tsdev->dev, "ipc error during adc read\n");
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return err;
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}
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/*************************** Freescale Interface ************************/
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static int mrstouch_fs_adc_read_prepare(struct mrstouch_dev *tsdev)
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{
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int err, count;
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u16 chan;
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u16 reg[5];
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u8 data[5];
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/* Stop the ADC */
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err = intel_scu_ipc_update_register(PMIC_REG_MADCINT, 0x00, 0x02);
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if (err)
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goto ipc_error;
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chan = PMICADDR0 + tsdev->asr;
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/* Set X BIAS */
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for (count = 0; count <= 3; count++) {
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reg[count] = chan++;
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data[count] = 0x2A;
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}
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reg[count] = chan++; /* Dummy */
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data[count] = 0;
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err = intel_scu_ipc_writev(reg, data, 5);
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if (err)
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goto ipc_error;
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msleep(WAIT_ADC_COMPLETION);
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/* Set Y BIAS */
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for (count = 0; count <= 3; count++) {
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reg[count] = chan++;
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data[count] = 0x4A;
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}
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reg[count] = chan++; /* Dummy */
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data[count] = 0;
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err = intel_scu_ipc_writev(reg, data, 5);
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if (err)
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goto ipc_error;
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msleep(WAIT_ADC_COMPLETION);
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/* Set Z BIAS */
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err = intel_scu_ipc_iowrite32(chan + 2, 0x8A8A8A8A);
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if (err)
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goto ipc_error;
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msleep(WAIT_ADC_COMPLETION);
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return 0;
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ipc_error:
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dev_err(tsdev->dev, "ipc error during %s\n", __func__);
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return err;
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}
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static int mrstouch_fs_adc_read(struct mrstouch_dev *tsdev,
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u16 *x, u16 *y, u16 *z)
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{
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int err;
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u16 result;
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u16 reg[4];
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u8 data[4];
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result = PMIC_REG_ADCSNS0H + tsdev->asr;
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reg[0] = result + 4;
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reg[1] = result + 5;
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reg[2] = result + 16;
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reg[3] = result + 17;
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err = intel_scu_ipc_readv(reg, data, 4);
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if (err)
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goto ipc_error;
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*x = data[0] << 3; /* Higher 7 bits */
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*x |= data[1] & 0x7; /* Lower 3 bits */
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*x &= 0x3FF;
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*y = data[2] << 3; /* Higher 7 bits */
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*y |= data[3] & 0x7; /* Lower 3 bits */
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*y &= 0x3FF;
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/* Read Z value */
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reg[0] = result + 28;
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reg[1] = result + 29;
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err = intel_scu_ipc_readv(reg, data, 4);
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if (err)
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goto ipc_error;
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*z = data[0] << 3; /* Higher 7 bits */
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*z |= data[1] & 0x7; /* Lower 3 bits */
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*z &= 0x3FF;
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return 0;
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ipc_error:
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dev_err(tsdev->dev, "ipc error during %s\n", __func__);
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return err;
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}
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static int mrstouch_fs_adc_read_finish(struct mrstouch_dev *tsdev)
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{
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int err, count;
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u16 chan;
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u16 reg[5];
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u8 data[5];
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/* Clear all TS channels */
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chan = PMICADDR0 + tsdev->asr;
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for (count = 0; count <= 4; count++) {
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reg[count] = chan++;
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data[count] = 0;
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}
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err = intel_scu_ipc_writev(reg, data, 5);
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if (err)
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goto ipc_error;
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for (count = 0; count <= 4; count++) {
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reg[count] = chan++;
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data[count] = 0;
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}
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err = intel_scu_ipc_writev(reg, data, 5);
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if (err)
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goto ipc_error;
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err = intel_scu_ipc_iowrite32(chan + 2, 0x00000000);
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if (err)
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goto ipc_error;
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/* Start ADC */
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err = intel_scu_ipc_update_register(PMIC_REG_MADCINT, 0x02, 0x02);
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if (err)
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goto ipc_error;
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return 0;
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ipc_error:
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dev_err(tsdev->dev, "ipc error during %s\n", __func__);
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return err;
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}
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static void mrstouch_report_event(struct input_dev *input,
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unsigned int x, unsigned int y, unsigned int z)
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{
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if (z > MRST_PRESSURE_NOMINAL) {
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/* Pen touched, report button touch and coordinates */
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input_report_key(input, BTN_TOUCH, 1);
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input_report_abs(input, ABS_X, x);
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input_report_abs(input, ABS_Y, y);
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} else {
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input_report_key(input, BTN_TOUCH, 0);
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}
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input_report_abs(input, ABS_PRESSURE, z);
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input_sync(input);
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}
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/* PENDET interrupt handler */
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static irqreturn_t mrstouch_pendet_irq(int irq, void *dev_id)
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{
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struct mrstouch_dev *tsdev = dev_id;
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u16 x, y, z;
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/*
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* Should we lower thread priority? Probably not, since we are
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* not spinning but sleeping...
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*/
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if (tsdev->read_prepare(tsdev))
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goto out;
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do {
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if (tsdev->read(tsdev, &x, &y, &z))
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break;
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mrstouch_report_event(tsdev->input, x, y, z);
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} while (z > MRST_PRESSURE_NOMINAL);
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tsdev->read_finish(tsdev);
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out:
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return IRQ_HANDLED;
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}
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/* Utility to read PMIC ID */
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static int mrstouch_read_pmic_id(uint *vendor, uint *rev)
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{
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int err;
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u8 r;
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err = intel_scu_ipc_ioread8(PMIC_REG_ID1, &r);
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if (err)
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return err;
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*vendor = r & 0x7;
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*rev = (r >> 3) & 0x7;
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return 0;
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}
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/*
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* Parse ADC channels to find end of the channel configured by other ADC user
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* NEC and MAXIM requires 4 channels and FreeScale needs 18 channels
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*/
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static int mrstouch_chan_parse(struct mrstouch_dev *tsdev)
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{
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int found = 0;
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int err, i;
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u8 r8;
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for (i = 0; i < MRSTOUCH_MAX_CHANNELS; i++) {
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err = intel_scu_ipc_ioread8(PMICADDR0 + i, &r8);
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if (err)
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return err;
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if (r8 == END_OF_CHANNEL) {
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found = i;
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break;
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}
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}
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if (tsdev->vendor == PMIC_VENDOR_FS) {
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if (found > MRSTOUCH_MAX_CHANNELS - 18)
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return -ENOSPC;
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} else {
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if (found > MRSTOUCH_MAX_CHANNELS - 4)
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return -ENOSPC;
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}
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return found;
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}
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/*
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* Writes touch screen channels to ADC address selection registers
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*/
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static int mrstouch_ts_chan_set(uint offset)
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{
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u16 chan;
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int ret, count;
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chan = PMICADDR0 + offset;
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for (count = 0; count <= 3; count++) {
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ret = intel_scu_ipc_iowrite8(chan++, MRST_TS_CHAN10 + count);
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if (ret)
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return ret;
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}
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return intel_scu_ipc_iowrite8(chan++, END_OF_CHANNEL);
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}
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/* Initialize ADC */
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static int mrstouch_adc_init(struct mrstouch_dev *tsdev)
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{
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int err, start;
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u8 ra, rm;
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err = mrstouch_read_pmic_id(&tsdev->vendor, &tsdev->rev);
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if (err) {
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dev_err(tsdev->dev, "Unable to read PMIC id\n");
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return err;
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}
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switch (tsdev->vendor) {
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case PMIC_VENDOR_NEC:
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case PMIC_VENDOR_MAXIM:
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tsdev->read_prepare = mrstouch_nec_adc_read_prepare;
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tsdev->read = mrstouch_nec_adc_read;
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tsdev->read_finish = mrstouch_nec_adc_read_finish;
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break;
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case PMIC_VENDOR_FS:
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tsdev->read_prepare = mrstouch_fs_adc_read_prepare;
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tsdev->read = mrstouch_fs_adc_read;
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tsdev->read_finish = mrstouch_fs_adc_read_finish;
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break;
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default:
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dev_err(tsdev->dev,
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"Unsupported touchscreen: %d\n", tsdev->vendor);
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return -ENXIO;
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}
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start = mrstouch_chan_parse(tsdev);
|
|
if (start < 0) {
|
|
dev_err(tsdev->dev, "Unable to parse channels\n");
|
|
return start;
|
|
}
|
|
|
|
tsdev->asr = start;
|
|
|
|
/*
|
|
* ADC power on, start, enable PENDET and set loop delay
|
|
* ADC loop delay is set to 4.5 ms approximately
|
|
* Loop delay more than this results in jitter in adc readings
|
|
* Setting loop delay to 0 (continuous loop) in MAXIM stops PENDET
|
|
* interrupt generation sometimes.
|
|
*/
|
|
|
|
if (tsdev->vendor == PMIC_VENDOR_FS) {
|
|
ra = 0xE0 | ADC_LOOP_DELAY0;
|
|
rm = 0x5;
|
|
} else {
|
|
/* NEC and MAXIm not consistent with loop delay 0 */
|
|
ra = 0xE0 | ADC_LOOP_DELAY1;
|
|
rm = 0x0;
|
|
|
|
/* configure touch screen channels */
|
|
err = mrstouch_ts_chan_set(tsdev->asr);
|
|
if (err)
|
|
return err;
|
|
}
|
|
|
|
err = intel_scu_ipc_update_register(PMIC_REG_ADCCNTL1, ra, 0xE7);
|
|
if (err)
|
|
return err;
|
|
|
|
err = intel_scu_ipc_update_register(PMIC_REG_MADCINT, rm, 0x03);
|
|
if (err)
|
|
return err;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/* Probe function for touch screen driver */
|
|
static int mrstouch_probe(struct platform_device *pdev)
|
|
{
|
|
struct mrstouch_dev *tsdev;
|
|
struct input_dev *input;
|
|
int err;
|
|
int irq;
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (irq < 0) {
|
|
dev_err(&pdev->dev, "no interrupt assigned\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
tsdev = devm_kzalloc(&pdev->dev, sizeof(struct mrstouch_dev),
|
|
GFP_KERNEL);
|
|
if (!tsdev) {
|
|
dev_err(&pdev->dev, "unable to allocate memory\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
input = devm_input_allocate_device(&pdev->dev);
|
|
if (!input) {
|
|
dev_err(&pdev->dev, "unable to allocate input device\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
tsdev->dev = &pdev->dev;
|
|
tsdev->input = input;
|
|
tsdev->irq = irq;
|
|
|
|
snprintf(tsdev->phys, sizeof(tsdev->phys),
|
|
"%s/input0", dev_name(tsdev->dev));
|
|
|
|
err = mrstouch_adc_init(tsdev);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "ADC initialization failed\n");
|
|
return err;
|
|
}
|
|
|
|
input->name = "mrst_touchscreen";
|
|
input->phys = tsdev->phys;
|
|
input->dev.parent = tsdev->dev;
|
|
|
|
input->id.vendor = tsdev->vendor;
|
|
input->id.version = tsdev->rev;
|
|
|
|
input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
|
|
input->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
|
|
|
|
input_set_abs_params(tsdev->input, ABS_X,
|
|
MRST_X_MIN, MRST_X_MAX, MRST_X_FUZZ, 0);
|
|
input_set_abs_params(tsdev->input, ABS_Y,
|
|
MRST_Y_MIN, MRST_Y_MAX, MRST_Y_FUZZ, 0);
|
|
input_set_abs_params(tsdev->input, ABS_PRESSURE,
|
|
MRST_PRESSURE_MIN, MRST_PRESSURE_MAX, 0, 0);
|
|
|
|
err = devm_request_threaded_irq(&pdev->dev, tsdev->irq, NULL,
|
|
mrstouch_pendet_irq, IRQF_ONESHOT,
|
|
"mrstouch", tsdev);
|
|
if (err) {
|
|
dev_err(tsdev->dev, "unable to allocate irq\n");
|
|
return err;
|
|
}
|
|
|
|
err = input_register_device(tsdev->input);
|
|
if (err) {
|
|
dev_err(tsdev->dev, "unable to register input device\n");
|
|
return err;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver mrstouch_driver = {
|
|
.driver = {
|
|
.name = "pmic_touch",
|
|
},
|
|
.probe = mrstouch_probe,
|
|
};
|
|
module_platform_driver(mrstouch_driver);
|
|
|
|
MODULE_AUTHOR("Sreedhara Murthy. D.S, sreedhara.ds@intel.com");
|
|
MODULE_DESCRIPTION("Intel Moorestown Resistive Touch Screen Driver");
|
|
MODULE_LICENSE("GPL");
|