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00a9730e10
linux/arch/csky/mm
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Guo Ren 00a9730e10 csky: Cache and TLB routines 
This patch adds cache and tlb sync codes for abiv1 & abiv2.

Signed-off-by: Guo Ren <ren_guo@c-sky.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2018-10-25 23:36:19 +08:00
..
cachev1.c csky: Cache and TLB routines 2018-10-25 23:36:19 +08:00
cachev2.c csky: Cache and TLB routines 2018-10-25 23:36:19 +08:00
fault.c csky: Exception handling and mm-fault 2018-10-25 23:36:19 +08:00
Makefile
syscache.c csky: Cache and TLB routines 2018-10-25 23:36:19 +08:00
tlb.c csky: Cache and TLB routines 2018-10-25 23:36:19 +08:00