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e793b284d7
Follow the recent trend for the license description. This is also in an effort to fully sync the devicetrees with U-Boot. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
78 lines
1.1 KiB
Plaintext
78 lines
1.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2013 Altera Corporation <www.altera.com>
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*/
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/dts-v1/;
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#include "socfpga.dtsi"
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/ {
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model = "Altera SOCFPGA VT";
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compatible = "altr,socfpga-vt", "altr,socfpga";
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chosen {
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bootargs = "console=ttyS0,57600";
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};
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memory@0 {
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name = "memory";
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device_type = "memory";
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reg = <0x0 0x40000000>; /* 1 GB */
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};
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soc {
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clkmgr@ffd04000 {
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clocks {
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osc1 {
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clock-frequency = <10000000>;
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};
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};
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};
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dwmmc0@ff704000 {
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broken-cd;
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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};
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ethernet@ff700000 {
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phy-mode = "gmii";
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status = "okay";
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};
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timer0@ffc08000 {
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clock-frequency = <7000000>;
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};
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timer1@ffc09000 {
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clock-frequency = <7000000>;
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};
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timer2@ffd00000 {
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clock-frequency = <7000000>;
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};
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timer3@ffd01000 {
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clock-frequency = <7000000>;
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};
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serial0@ffc02000 {
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clock-frequency = <7372800>;
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};
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serial1@ffc03000 {
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clock-frequency = <7372800>;
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};
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sysmgr@ffd08000 {
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cpu1-start-addr = <0xffd08010>;
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};
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};
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};
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&gmac0 {
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status = "okay";
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phy-mode = "gmii";
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};
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