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66156ea9e9
Add the PWM0 interface and one output of channel 0 (on PC10) on this headless board. The output conflicts with LCD and ISI, so only enable it for this particular board of the series (ISI is enabled on at91sam9g25ek, as an example but we can do the other way around). Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
41 lines
771 B
Plaintext
41 lines
771 B
Plaintext
/*
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* at91sam9x25ek.dts - Device Tree file for AT91SAM9X25-EK board
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*
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* Copyright (C) 2012 Atmel,
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* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/dts-v1/;
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#include "at91sam9x25.dtsi"
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#include "at91sam9x5ek.dtsi"
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/ {
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model = "Atmel AT91SAM9X25-EK";
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compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
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ahb {
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apb {
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can1: can@f8004000 {
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status = "okay";
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};
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macb0: ethernet@f802c000 {
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phy-mode = "rmii";
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status = "okay";
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};
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macb1: ethernet@f8030000 {
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phy-mode = "rmii";
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status = "okay";
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};
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pwm0: pwm@f8034000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm0_pwm0_1>;
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status = "okay";
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};
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};
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};
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};
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