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577a67662f
The name of cxl_setup_parent_dport() function is not clear, the function is used to initialize AER and RAS capabilities on a dport, therefore, rename the function to cxl_dport_init_ras_reporting(), it is easier for user to understand what the function does. Besides, adjust the order of the function parameters, the subject of cxl_dport_init_ras_reporting() is a cxl dport, so a struct cxl_dport as the first parameter of the function should be better. cxl_dport_map_regs() is used to map CXL RAS capability on a cxl dport, using cxl_dport_map_ras() as the function name. Signed-off-by: Li Ming <ming4.li@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://patch.msgid.link/20240830061308.2327065-1-ming4.li@intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
73 lines
2.1 KiB
Makefile
73 lines
2.1 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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ldflags-y += --wrap=acpi_table_parse_cedt
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ldflags-y += --wrap=is_acpi_device_node
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ldflags-y += --wrap=acpi_evaluate_integer
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ldflags-y += --wrap=acpi_pci_find_root
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ldflags-y += --wrap=nvdimm_bus_register
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ldflags-y += --wrap=devm_cxl_port_enumerate_dports
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ldflags-y += --wrap=devm_cxl_setup_hdm
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ldflags-y += --wrap=devm_cxl_add_passthrough_decoder
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ldflags-y += --wrap=devm_cxl_enumerate_decoders
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ldflags-y += --wrap=cxl_await_media_ready
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ldflags-y += --wrap=cxl_hdm_decode_init
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ldflags-y += --wrap=cxl_dvsec_rr_decode
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ldflags-y += --wrap=devm_cxl_add_rch_dport
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ldflags-y += --wrap=cxl_rcd_component_reg_phys
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ldflags-y += --wrap=cxl_endpoint_parse_cdat
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ldflags-y += --wrap=cxl_dport_init_ras_reporting
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DRIVERS := ../../../drivers
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CXL_SRC := $(DRIVERS)/cxl
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CXL_CORE_SRC := $(DRIVERS)/cxl/core
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ccflags-y := -I$(srctree)/drivers/cxl/
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ccflags-y += -D__mock=__weak
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ccflags-y += -DTRACE_INCLUDE_PATH=$(CXL_CORE_SRC) -I$(srctree)/drivers/cxl/core/
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obj-m += cxl_acpi.o
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cxl_acpi-y := $(CXL_SRC)/acpi.o
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cxl_acpi-y += mock_acpi.o
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cxl_acpi-y += config_check.o
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cxl_acpi-y += cxl_acpi_test.o
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obj-m += cxl_pmem.o
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cxl_pmem-y := $(CXL_SRC)/pmem.o
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cxl_pmem-y += $(CXL_SRC)/security.o
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cxl_pmem-y += config_check.o
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cxl_pmem-y += cxl_pmem_test.o
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obj-m += cxl_port.o
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cxl_port-y := $(CXL_SRC)/port.o
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cxl_port-y += config_check.o
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cxl_port-y += cxl_port_test.o
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obj-m += cxl_mem.o
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cxl_mem-y := $(CXL_SRC)/mem.o
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cxl_mem-y += config_check.o
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cxl_mem-y += cxl_mem_test.o
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obj-m += cxl_core.o
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cxl_core-y := $(CXL_CORE_SRC)/port.o
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cxl_core-y += $(CXL_CORE_SRC)/pmem.o
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cxl_core-y += $(CXL_CORE_SRC)/regs.o
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cxl_core-y += $(CXL_CORE_SRC)/memdev.o
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cxl_core-y += $(CXL_CORE_SRC)/mbox.o
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cxl_core-y += $(CXL_CORE_SRC)/pci.o
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cxl_core-y += $(CXL_CORE_SRC)/hdm.o
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cxl_core-y += $(CXL_CORE_SRC)/pmu.o
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cxl_core-y += $(CXL_CORE_SRC)/cdat.o
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cxl_core-$(CONFIG_TRACING) += $(CXL_CORE_SRC)/trace.o
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cxl_core-$(CONFIG_CXL_REGION) += $(CXL_CORE_SRC)/region.o
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cxl_core-y += config_check.o
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cxl_core-y += cxl_core_test.o
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cxl_core-y += cxl_core_exports.o
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KBUILD_CFLAGS := $(filter-out -Wmissing-prototypes -Wmissing-declarations, $(KBUILD_CFLAGS))
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obj-m += test/
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