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Digiteq Automotive MGB4 is a modular frame grabber PCIe card for automotive video interfaces. As for now, two modules - FPD-Link and GMSL - are available and supported by the driver. The card has two inputs and two outputs (FPD-Link only). In addition to the video interfaces it also provides a trigger signal interface and a MTD interface for FPGA firmware upload. Signed-off-by: Martin Tůma <martin.tuma@digiteqautomotive.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
124 lines
3.0 KiB
C
124 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2021-2022 Digiteq Automotive
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* author: Martin Tuma <martin.tuma@digiteqautomotive.com>
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*
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* This module handles the DMA transfers. A standard dmaengine API as provided
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* by the XDMA module is used.
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*/
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#include <linux/pci.h>
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#include <linux/dma-direction.h>
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#include "mgb4_core.h"
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#include "mgb4_dma.h"
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static void chan_irq(void *param)
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{
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struct mgb4_dma_channel *chan = param;
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complete(&chan->req_compl);
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}
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int mgb4_dma_transfer(struct mgb4_dev *mgbdev, u32 channel, bool write,
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u64 paddr, struct sg_table *sgt)
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{
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struct dma_slave_config cfg;
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struct mgb4_dma_channel *chan;
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struct dma_async_tx_descriptor *tx;
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struct pci_dev *pdev = mgbdev->pdev;
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int ret;
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memset(&cfg, 0, sizeof(cfg));
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if (write) {
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cfg.direction = DMA_MEM_TO_DEV;
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cfg.dst_addr = paddr;
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cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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chan = &mgbdev->h2c_chan[channel];
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} else {
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cfg.direction = DMA_DEV_TO_MEM;
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cfg.src_addr = paddr;
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cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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chan = &mgbdev->c2h_chan[channel];
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}
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ret = dmaengine_slave_config(chan->chan, &cfg);
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if (ret) {
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dev_err(&pdev->dev, "failed to config dma: %d\n", ret);
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return ret;
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}
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tx = dmaengine_prep_slave_sg(chan->chan, sgt->sgl, sgt->nents,
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cfg.direction, 0);
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if (!tx) {
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dev_err(&pdev->dev, "failed to prep slave sg\n");
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return -EIO;
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}
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tx->callback = chan_irq;
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tx->callback_param = chan;
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ret = dma_submit_error(dmaengine_submit(tx));
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if (ret) {
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dev_err(&pdev->dev, "failed to submit sg\n");
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return -EIO;
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}
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dma_async_issue_pending(chan->chan);
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if (!wait_for_completion_timeout(&chan->req_compl,
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msecs_to_jiffies(10000))) {
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dev_err(&pdev->dev, "dma timeout\n");
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dmaengine_terminate_sync(chan->chan);
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return -EIO;
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}
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return 0;
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}
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int mgb4_dma_channel_init(struct mgb4_dev *mgbdev)
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{
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int i, ret;
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char name[16];
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struct pci_dev *pdev = mgbdev->pdev;
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for (i = 0; i < MGB4_VIN_DEVICES; i++) {
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sprintf(name, "c2h%d", i);
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mgbdev->c2h_chan[i].chan = dma_request_chan(&pdev->dev, name);
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if (IS_ERR(mgbdev->c2h_chan[i].chan)) {
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dev_err(&pdev->dev, "failed to initialize %s", name);
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ret = PTR_ERR(mgbdev->c2h_chan[i].chan);
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mgbdev->c2h_chan[i].chan = NULL;
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return ret;
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}
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init_completion(&mgbdev->c2h_chan[i].req_compl);
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}
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for (i = 0; i < MGB4_VOUT_DEVICES; i++) {
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sprintf(name, "h2c%d", i);
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mgbdev->h2c_chan[i].chan = dma_request_chan(&pdev->dev, name);
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if (IS_ERR(mgbdev->h2c_chan[i].chan)) {
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dev_err(&pdev->dev, "failed to initialize %s", name);
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ret = PTR_ERR(mgbdev->h2c_chan[i].chan);
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mgbdev->h2c_chan[i].chan = NULL;
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return ret;
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}
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init_completion(&mgbdev->h2c_chan[i].req_compl);
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}
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return 0;
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}
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void mgb4_dma_channel_free(struct mgb4_dev *mgbdev)
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{
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int i;
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for (i = 0; i < MGB4_VIN_DEVICES; i++) {
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if (mgbdev->c2h_chan[i].chan)
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dma_release_channel(mgbdev->c2h_chan[i].chan);
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}
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for (i = 0; i < MGB4_VOUT_DEVICES; i++) {
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if (mgbdev->h2c_chan[i].chan)
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dma_release_channel(mgbdev->h2c_chan[i].chan);
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}
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}
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