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fa35757ae0
This single node has its own clock which seems to be responsible for
transactions between CPUSS (CPU + some stuff) and the GNOC. See [1]
for reference.
Define it and hook it up.
[1] 02f8c342b2
%5E%21/#F0
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230726-topic-icc_coeff-v4-5-c04b60caa467@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
84 lines
1.8 KiB
C
84 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2023 Linaro Ltd
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*/
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#include <linux/soc/qcom/smd-rpm.h>
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#include "icc-rpm.h"
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const struct rpm_clk_resource aggre1_clk = {
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.resource_type = QCOM_SMD_RPM_AGGR_CLK,
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.clock_id = 1,
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};
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EXPORT_SYMBOL_GPL(aggre1_clk);
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const struct rpm_clk_resource aggre2_clk = {
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.resource_type = QCOM_SMD_RPM_AGGR_CLK,
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.clock_id = 2,
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};
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EXPORT_SYMBOL_GPL(aggre2_clk);
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const struct rpm_clk_resource bimc_clk = {
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.resource_type = QCOM_SMD_RPM_MEM_CLK,
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.clock_id = 0,
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};
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EXPORT_SYMBOL_GPL(bimc_clk);
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const struct rpm_clk_resource mem_1_clk = {
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.resource_type = QCOM_SMD_RPM_MEM_CLK,
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.clock_id = 1,
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};
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EXPORT_SYMBOL_GPL(mem_1_clk);
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const struct rpm_clk_resource bus_0_clk = {
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.resource_type = QCOM_SMD_RPM_BUS_CLK,
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.clock_id = 0,
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};
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EXPORT_SYMBOL_GPL(bus_0_clk);
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const struct rpm_clk_resource bus_1_clk = {
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.resource_type = QCOM_SMD_RPM_BUS_CLK,
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.clock_id = 1,
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};
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EXPORT_SYMBOL_GPL(bus_1_clk);
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const struct rpm_clk_resource bus_2_clk = {
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.resource_type = QCOM_SMD_RPM_BUS_CLK,
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.clock_id = 2,
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};
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EXPORT_SYMBOL_GPL(bus_2_clk);
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const struct rpm_clk_resource mmaxi_0_clk = {
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.resource_type = QCOM_SMD_RPM_MMAXI_CLK,
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.clock_id = 0,
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};
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EXPORT_SYMBOL_GPL(mmaxi_0_clk);
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const struct rpm_clk_resource mmaxi_1_clk = {
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.resource_type = QCOM_SMD_RPM_MMAXI_CLK,
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.clock_id = 1,
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};
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EXPORT_SYMBOL_GPL(mmaxi_1_clk);
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const struct rpm_clk_resource qup_clk = {
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.resource_type = QCOM_SMD_RPM_QUP_CLK,
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.clock_id = 0,
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};
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EXPORT_SYMBOL_GPL(qup_clk);
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/* Branch clocks */
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const struct rpm_clk_resource aggre1_branch_clk = {
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.resource_type = QCOM_SMD_RPM_AGGR_CLK,
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.clock_id = 1,
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.branch = true,
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};
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EXPORT_SYMBOL_GPL(aggre1_branch_clk);
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const struct rpm_clk_resource aggre2_branch_clk = {
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.resource_type = QCOM_SMD_RPM_AGGR_CLK,
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.clock_id = 2,
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.branch = true,
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};
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EXPORT_SYMBOL_GPL(aggre2_branch_clk);
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