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In the protocol of IEEE 1394, phy configuration packet is broadcasted to the bus to configure all PHYs residing on the bus. It includes two purposes; selecting root node and optimizing gap count. This commit adds some helper function to serialize/deserialize the content of phy configuration packet, as well as some KUnit tests for it. Link: https://lore.kernel.org/r/20240606235133.231543-2-o-takashi@sakamocchi.jp Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
303 lines
9.8 KiB
C
303 lines
9.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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//
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// phy-packet-definitions.h - The definitions of phy packet for IEEE 1394.
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//
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// Copyright (c) 2024 Takashi Sakamoto
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#ifndef _FIREWIRE_PHY_PACKET_DEFINITIONS_H
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#define _FIREWIRE_PHY_PACKET_DEFINITIONS_H
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#define PACKET_IDENTIFIER_MASK 0xc0000000
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#define PACKET_IDENTIFIER_SHIFT 30
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static inline unsigned int phy_packet_get_packet_identifier(u32 quadlet)
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{
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return (quadlet & PACKET_IDENTIFIER_MASK) >> PACKET_IDENTIFIER_SHIFT;
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}
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static inline void phy_packet_set_packet_identifier(u32 *quadlet, unsigned int packet_identifier)
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{
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*quadlet &= ~PACKET_IDENTIFIER_MASK;
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*quadlet |= (packet_identifier << PACKET_IDENTIFIER_SHIFT) & PACKET_IDENTIFIER_MASK;
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}
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#define PHY_PACKET_PACKET_IDENTIFIER_PHY_CONFIG 0
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#define PHY_CONFIG_ROOT_ID_MASK 0x3f000000
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#define PHY_CONFIG_ROOT_ID_SHIFT 24
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#define PHY_CONFIG_FORCE_ROOT_NODE_MASK 0x00800000
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#define PHY_CONFIG_FORCE_ROOT_NODE_SHIFT 23
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#define PHY_CONFIG_GAP_COUNT_OPTIMIZATION_MASK 0x00400000
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#define PHY_CONFIG_GAP_COUNT_OPTIMIZATION_SHIFT 22
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#define PHY_CONFIG_GAP_COUNT_MASK 0x003f0000
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#define PHY_CONFIG_GAP_COUNT_SHIFT 16
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static inline unsigned int phy_packet_phy_config_get_root_id(u32 quadlet)
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{
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return (quadlet & PHY_CONFIG_ROOT_ID_MASK) >> PHY_CONFIG_ROOT_ID_SHIFT;
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}
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static inline void phy_packet_phy_config_set_root_id(u32 *quadlet, unsigned int root_id)
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{
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*quadlet &= ~PHY_CONFIG_ROOT_ID_MASK;
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*quadlet |= (root_id << PHY_CONFIG_ROOT_ID_SHIFT) & PHY_CONFIG_ROOT_ID_MASK;
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}
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static inline bool phy_packet_phy_config_get_force_root_node(u32 quadlet)
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{
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return (quadlet & PHY_CONFIG_FORCE_ROOT_NODE_MASK) >> PHY_CONFIG_FORCE_ROOT_NODE_SHIFT;
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}
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static inline void phy_packet_phy_config_set_force_root_node(u32 *quadlet, bool has_force_root_node)
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{
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*quadlet &= ~PHY_CONFIG_FORCE_ROOT_NODE_MASK;
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*quadlet |= (has_force_root_node << PHY_CONFIG_FORCE_ROOT_NODE_SHIFT) & PHY_CONFIG_FORCE_ROOT_NODE_MASK;
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}
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static inline bool phy_packet_phy_config_get_gap_count_optimization(u32 quadlet)
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{
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return (quadlet & PHY_CONFIG_GAP_COUNT_OPTIMIZATION_MASK) >> PHY_CONFIG_GAP_COUNT_OPTIMIZATION_SHIFT;
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}
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static inline void phy_packet_phy_config_set_gap_count_optimization(u32 *quadlet, bool has_gap_count_optimization)
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{
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*quadlet &= ~PHY_CONFIG_GAP_COUNT_OPTIMIZATION_MASK;
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*quadlet |= (has_gap_count_optimization << PHY_CONFIG_GAP_COUNT_OPTIMIZATION_SHIFT) & PHY_CONFIG_GAP_COUNT_OPTIMIZATION_MASK;
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}
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static inline unsigned int phy_packet_phy_config_get_gap_count(u32 quadlet)
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{
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return (quadlet & PHY_CONFIG_GAP_COUNT_MASK) >> PHY_CONFIG_GAP_COUNT_SHIFT;
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}
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static inline void phy_packet_phy_config_set_gap_count(u32 *quadlet, unsigned int gap_count)
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{
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*quadlet &= ~PHY_CONFIG_GAP_COUNT_MASK;
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*quadlet |= (gap_count << PHY_CONFIG_GAP_COUNT_SHIFT) & PHY_CONFIG_GAP_COUNT_MASK;
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}
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#define PHY_PACKET_PACKET_IDENTIFIER_SELF_ID 2
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#define SELF_ID_PHY_ID_MASK 0x3f000000
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#define SELF_ID_PHY_ID_SHIFT 24
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#define SELF_ID_EXTENDED_MASK 0x00800000
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#define SELF_ID_EXTENDED_SHIFT 23
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#define SELF_ID_MORE_PACKETS_MASK 0x00000001
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#define SELF_ID_MORE_PACKETS_SHIFT 0
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#define SELF_ID_ZERO_LINK_ACTIVE_MASK 0x00400000
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#define SELF_ID_ZERO_LINK_ACTIVE_SHIFT 22
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#define SELF_ID_ZERO_GAP_COUNT_MASK 0x003f0000
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#define SELF_ID_ZERO_GAP_COUNT_SHIFT 16
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#define SELF_ID_ZERO_SCODE_MASK 0x0000c000
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#define SELF_ID_ZERO_SCODE_SHIFT 14
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#define SELF_ID_ZERO_CONTENDER_MASK 0x00000800
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#define SELF_ID_ZERO_CONTENDER_SHIFT 11
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#define SELF_ID_ZERO_POWER_CLASS_MASK 0x00000700
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#define SELF_ID_ZERO_POWER_CLASS_SHIFT 8
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#define SELF_ID_ZERO_INITIATED_RESET_MASK 0x00000002
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#define SELF_ID_ZERO_INITIATED_RESET_SHIFT 1
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#define SELF_ID_EXTENDED_SEQUENCE_MASK 0x00700000
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#define SELF_ID_EXTENDED_SEQUENCE_SHIFT 20
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#define SELF_ID_PORT_STATUS_MASK 0x3
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#define SELF_ID_SEQUENCE_MAXIMUM_QUADLET_COUNT 4
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static inline unsigned int phy_packet_self_id_get_phy_id(u32 quadlet)
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{
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return (quadlet & SELF_ID_PHY_ID_MASK) >> SELF_ID_PHY_ID_SHIFT;
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}
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static inline void phy_packet_self_id_set_phy_id(u32 *quadlet, unsigned int phy_id)
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{
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*quadlet &= ~SELF_ID_PHY_ID_MASK;
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*quadlet |= (phy_id << SELF_ID_PHY_ID_SHIFT) & SELF_ID_PHY_ID_MASK;
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}
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static inline bool phy_packet_self_id_get_extended(u32 quadlet)
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{
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return (quadlet & SELF_ID_EXTENDED_MASK) >> SELF_ID_EXTENDED_SHIFT;
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}
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static inline void phy_packet_self_id_set_extended(u32 *quadlet, bool extended)
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{
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*quadlet &= ~SELF_ID_EXTENDED_MASK;
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*quadlet |= (extended << SELF_ID_EXTENDED_SHIFT) & SELF_ID_EXTENDED_MASK;
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}
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static inline bool phy_packet_self_id_zero_get_link_active(u32 quadlet)
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{
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return (quadlet & SELF_ID_ZERO_LINK_ACTIVE_MASK) >> SELF_ID_ZERO_LINK_ACTIVE_SHIFT;
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}
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static inline void phy_packet_self_id_zero_set_link_active(u32 *quadlet, bool is_active)
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{
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*quadlet &= ~SELF_ID_ZERO_LINK_ACTIVE_MASK;
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*quadlet |= (is_active << SELF_ID_ZERO_LINK_ACTIVE_SHIFT) & SELF_ID_ZERO_LINK_ACTIVE_MASK;
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}
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static inline unsigned int phy_packet_self_id_zero_get_gap_count(u32 quadlet)
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{
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return (quadlet & SELF_ID_ZERO_GAP_COUNT_MASK) >> SELF_ID_ZERO_GAP_COUNT_SHIFT;
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}
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static inline void phy_packet_self_id_zero_set_gap_count(u32 *quadlet, unsigned int gap_count)
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{
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*quadlet &= ~SELF_ID_ZERO_GAP_COUNT_MASK;
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*quadlet |= (gap_count << SELF_ID_ZERO_GAP_COUNT_SHIFT) & SELF_ID_ZERO_GAP_COUNT_MASK;
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}
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static inline unsigned int phy_packet_self_id_zero_get_scode(u32 quadlet)
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{
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return (quadlet & SELF_ID_ZERO_SCODE_MASK) >> SELF_ID_ZERO_SCODE_SHIFT;
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}
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static inline void phy_packet_self_id_zero_set_scode(u32 *quadlet, unsigned int speed)
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{
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*quadlet &= ~SELF_ID_ZERO_SCODE_MASK;
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*quadlet |= (speed << SELF_ID_ZERO_SCODE_SHIFT) & SELF_ID_ZERO_SCODE_MASK;
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}
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static inline bool phy_packet_self_id_zero_get_contender(u32 quadlet)
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{
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return (quadlet & SELF_ID_ZERO_CONTENDER_MASK) >> SELF_ID_ZERO_CONTENDER_SHIFT;
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}
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static inline void phy_packet_self_id_zero_set_contender(u32 *quadlet, bool is_contender)
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{
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*quadlet &= ~SELF_ID_ZERO_CONTENDER_MASK;
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*quadlet |= (is_contender << SELF_ID_ZERO_CONTENDER_SHIFT) & SELF_ID_ZERO_CONTENDER_MASK;
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}
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static inline unsigned int phy_packet_self_id_zero_get_power_class(u32 quadlet)
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{
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return (quadlet & SELF_ID_ZERO_POWER_CLASS_MASK) >> SELF_ID_ZERO_POWER_CLASS_SHIFT;
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}
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static inline void phy_packet_self_id_zero_set_power_class(u32 *quadlet, unsigned int power_class)
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{
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*quadlet &= ~SELF_ID_ZERO_POWER_CLASS_MASK;
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*quadlet |= (power_class << SELF_ID_ZERO_POWER_CLASS_SHIFT) & SELF_ID_ZERO_POWER_CLASS_MASK;
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}
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static inline bool phy_packet_self_id_zero_get_initiated_reset(u32 quadlet)
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{
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return (quadlet & SELF_ID_ZERO_INITIATED_RESET_MASK) >> SELF_ID_ZERO_INITIATED_RESET_SHIFT;
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}
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static inline void phy_packet_self_id_zero_set_initiated_reset(u32 *quadlet, bool is_initiated_reset)
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{
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*quadlet &= ~SELF_ID_ZERO_INITIATED_RESET_MASK;
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*quadlet |= (is_initiated_reset << SELF_ID_ZERO_INITIATED_RESET_SHIFT) & SELF_ID_ZERO_INITIATED_RESET_MASK;
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}
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static inline bool phy_packet_self_id_get_more_packets(u32 quadlet)
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{
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return (quadlet & SELF_ID_MORE_PACKETS_MASK) >> SELF_ID_MORE_PACKETS_SHIFT;
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}
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static inline void phy_packet_self_id_set_more_packets(u32 *quadlet, bool is_more_packets)
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{
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*quadlet &= ~SELF_ID_MORE_PACKETS_MASK;
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*quadlet |= (is_more_packets << SELF_ID_MORE_PACKETS_SHIFT) & SELF_ID_MORE_PACKETS_MASK;
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}
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static inline unsigned int phy_packet_self_id_extended_get_sequence(u32 quadlet)
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{
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return (quadlet & SELF_ID_EXTENDED_SEQUENCE_MASK) >> SELF_ID_EXTENDED_SEQUENCE_SHIFT;
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}
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static inline void phy_packet_self_id_extended_set_sequence(u32 *quadlet, unsigned int sequence)
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{
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*quadlet &= ~SELF_ID_EXTENDED_SEQUENCE_MASK;
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*quadlet |= (sequence << SELF_ID_EXTENDED_SHIFT) & SELF_ID_EXTENDED_SEQUENCE_MASK;
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}
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struct self_id_sequence_enumerator {
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const u32 *cursor;
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unsigned int quadlet_count;
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};
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static inline const u32 *self_id_sequence_enumerator_next(
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struct self_id_sequence_enumerator *enumerator, unsigned int *quadlet_count)
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{
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const u32 *self_id_sequence, *cursor;
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u32 quadlet;
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unsigned int count;
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unsigned int sequence;
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if (enumerator->cursor == NULL || enumerator->quadlet_count == 0)
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return ERR_PTR(-ENODATA);
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cursor = enumerator->cursor;
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count = 1;
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quadlet = *cursor;
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sequence = 0;
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while (phy_packet_self_id_get_more_packets(quadlet)) {
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if (count >= enumerator->quadlet_count ||
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count >= SELF_ID_SEQUENCE_MAXIMUM_QUADLET_COUNT)
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return ERR_PTR(-EPROTO);
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++cursor;
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++count;
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quadlet = *cursor;
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if (!phy_packet_self_id_get_extended(quadlet) ||
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sequence != phy_packet_self_id_extended_get_sequence(quadlet))
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return ERR_PTR(-EPROTO);
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++sequence;
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}
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*quadlet_count = count;
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self_id_sequence = enumerator->cursor;
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enumerator->cursor += count;
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enumerator->quadlet_count -= count;
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return self_id_sequence;
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}
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enum phy_packet_self_id_port_status {
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PHY_PACKET_SELF_ID_PORT_STATUS_NONE = 0,
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PHY_PACKET_SELF_ID_PORT_STATUS_NCONN = 1,
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PHY_PACKET_SELF_ID_PORT_STATUS_PARENT = 2,
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PHY_PACKET_SELF_ID_PORT_STATUS_CHILD = 3,
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};
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static inline unsigned int self_id_sequence_get_port_capacity(unsigned int quadlet_count)
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{
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return quadlet_count * 8 - 5;
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}
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static inline enum phy_packet_self_id_port_status self_id_sequence_get_port_status(
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const u32 *self_id_sequence, unsigned int quadlet_count, unsigned int port_index)
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{
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unsigned int index, shift;
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index = (port_index + 5) / 8;
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shift = 16 - ((port_index + 5) % 8) * 2;
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if (index < quadlet_count && index < SELF_ID_SEQUENCE_MAXIMUM_QUADLET_COUNT)
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return (self_id_sequence[index] >> shift) & SELF_ID_PORT_STATUS_MASK;
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return PHY_PACKET_SELF_ID_PORT_STATUS_NONE;
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}
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static inline void self_id_sequence_set_port_status(u32 *self_id_sequence, unsigned int quadlet_count,
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unsigned int port_index,
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enum phy_packet_self_id_port_status status)
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{
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unsigned int index, shift;
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index = (port_index + 5) / 8;
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shift = 16 - ((port_index + 5) % 8) * 2;
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if (index < quadlet_count) {
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self_id_sequence[index] &= ~(SELF_ID_PORT_STATUS_MASK << shift);
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self_id_sequence[index] |= status << shift;
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}
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}
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#endif // _FIREWIRE_PHY_PACKET_DEFINITIONS_H
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