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88707ebe77
When the TMR Manager detects a fault Lockstep state it is signaled to the MicroBlaze processors by asserting a break signal, When Microblaze gets a break vector from tmr Microblaze it's needed to clear/block the break bit in the tmr manager before performing recovery. In order to perform recovery need to perform the following steps. 1) Store all internal MicroBlaze registers in RAM 2) Execute a suspend instruction which asserts the reset signal 3) Restore all registers from RAM and execute an RTBD instruction to return from the reset handler, to resume execution at the place where the break occurred. This API supports getting called from kernel space only. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Link: https://lore.kernel.org/r/20220627064024.771037-3-appana.durga.rao@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>
132 lines
5.2 KiB
C
132 lines
5.2 KiB
C
/*
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* Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2007-2009 PetaLogix
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* Copyright (C) 2006 Atmark Techno, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/stddef.h>
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#include <linux/sched.h>
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#include <linux/kernel_stat.h>
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#include <linux/ptrace.h>
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#include <linux/hardirq.h>
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#include <linux/thread_info.h>
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#include <linux/kbuild.h>
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#include <asm/cpuinfo.h>
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int main(int argc, char *argv[])
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{
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/* struct pt_regs */
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DEFINE(PT_SIZE, sizeof(struct pt_regs));
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DEFINE(PT_MSR, offsetof(struct pt_regs, msr));
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DEFINE(PT_EAR, offsetof(struct pt_regs, ear));
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DEFINE(PT_ESR, offsetof(struct pt_regs, esr));
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DEFINE(PT_FSR, offsetof(struct pt_regs, fsr));
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DEFINE(PT_PC, offsetof(struct pt_regs, pc));
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DEFINE(PT_R0, offsetof(struct pt_regs, r0));
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DEFINE(PT_R1, offsetof(struct pt_regs, r1));
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DEFINE(PT_R2, offsetof(struct pt_regs, r2));
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DEFINE(PT_R3, offsetof(struct pt_regs, r3));
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DEFINE(PT_R4, offsetof(struct pt_regs, r4));
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DEFINE(PT_R5, offsetof(struct pt_regs, r5));
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DEFINE(PT_R6, offsetof(struct pt_regs, r6));
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DEFINE(PT_R7, offsetof(struct pt_regs, r7));
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DEFINE(PT_R8, offsetof(struct pt_regs, r8));
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DEFINE(PT_R9, offsetof(struct pt_regs, r9));
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DEFINE(PT_R10, offsetof(struct pt_regs, r10));
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DEFINE(PT_R11, offsetof(struct pt_regs, r11));
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DEFINE(PT_R12, offsetof(struct pt_regs, r12));
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DEFINE(PT_R13, offsetof(struct pt_regs, r13));
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DEFINE(PT_R14, offsetof(struct pt_regs, r14));
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DEFINE(PT_R15, offsetof(struct pt_regs, r15));
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DEFINE(PT_R16, offsetof(struct pt_regs, r16));
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DEFINE(PT_R17, offsetof(struct pt_regs, r17));
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DEFINE(PT_R18, offsetof(struct pt_regs, r18));
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DEFINE(PT_R19, offsetof(struct pt_regs, r19));
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DEFINE(PT_R20, offsetof(struct pt_regs, r20));
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DEFINE(PT_R21, offsetof(struct pt_regs, r21));
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DEFINE(PT_R22, offsetof(struct pt_regs, r22));
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DEFINE(PT_R23, offsetof(struct pt_regs, r23));
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DEFINE(PT_R24, offsetof(struct pt_regs, r24));
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DEFINE(PT_R25, offsetof(struct pt_regs, r25));
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DEFINE(PT_R26, offsetof(struct pt_regs, r26));
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DEFINE(PT_R27, offsetof(struct pt_regs, r27));
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DEFINE(PT_R28, offsetof(struct pt_regs, r28));
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DEFINE(PT_R29, offsetof(struct pt_regs, r29));
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DEFINE(PT_R30, offsetof(struct pt_regs, r30));
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DEFINE(PT_R31, offsetof(struct pt_regs, r31));
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DEFINE(PT_MODE, offsetof(struct pt_regs, pt_mode));
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BLANK();
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/* Magic offsets for PTRACE PEEK/POKE etc */
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DEFINE(PT_TEXT_ADDR, sizeof(struct pt_regs) + 1);
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DEFINE(PT_TEXT_LEN, sizeof(struct pt_regs) + 2);
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DEFINE(PT_DATA_ADDR, sizeof(struct pt_regs) + 3);
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BLANK();
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/* struct task_struct */
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DEFINE(TS_THREAD_INFO, offsetof(struct task_struct, stack));
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DEFINE(TASK_FLAGS, offsetof(struct task_struct, flags));
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DEFINE(TASK_PTRACE, offsetof(struct task_struct, ptrace));
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DEFINE(TASK_BLOCKED, offsetof(struct task_struct, blocked));
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DEFINE(TASK_MM, offsetof(struct task_struct, mm));
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DEFINE(TASK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
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DEFINE(TASK_PID, offsetof(struct task_struct, pid));
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DEFINE(TASK_THREAD, offsetof(struct task_struct, thread));
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DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
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BLANK();
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DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
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BLANK();
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/* struct thread_info */
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DEFINE(TI_TASK, offsetof(struct thread_info, task));
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DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
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DEFINE(TI_CPU_CONTEXT, offsetof(struct thread_info, cpu_context));
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DEFINE(TI_PREEMPT_COUNT, offsetof(struct thread_info, preempt_count));
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BLANK();
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/* struct cpu_context */
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DEFINE(CC_R1, offsetof(struct cpu_context, r1)); /* r1 */
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DEFINE(CC_R2, offsetof(struct cpu_context, r2));
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/* dedicated registers */
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DEFINE(CC_R13, offsetof(struct cpu_context, r13));
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DEFINE(CC_R14, offsetof(struct cpu_context, r14));
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DEFINE(CC_R15, offsetof(struct cpu_context, r15));
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DEFINE(CC_R16, offsetof(struct cpu_context, r16));
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DEFINE(CC_R17, offsetof(struct cpu_context, r17));
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DEFINE(CC_R18, offsetof(struct cpu_context, r18));
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/* non-volatile registers */
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DEFINE(CC_R19, offsetof(struct cpu_context, r19));
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DEFINE(CC_R20, offsetof(struct cpu_context, r20));
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DEFINE(CC_R21, offsetof(struct cpu_context, r21));
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DEFINE(CC_R22, offsetof(struct cpu_context, r22));
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DEFINE(CC_R23, offsetof(struct cpu_context, r23));
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DEFINE(CC_R24, offsetof(struct cpu_context, r24));
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DEFINE(CC_R25, offsetof(struct cpu_context, r25));
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DEFINE(CC_R26, offsetof(struct cpu_context, r26));
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DEFINE(CC_R27, offsetof(struct cpu_context, r27));
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DEFINE(CC_R28, offsetof(struct cpu_context, r28));
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DEFINE(CC_R29, offsetof(struct cpu_context, r29));
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DEFINE(CC_R30, offsetof(struct cpu_context, r30));
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/* special purpose registers */
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DEFINE(CC_MSR, offsetof(struct cpu_context, msr));
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DEFINE(CC_EAR, offsetof(struct cpu_context, ear));
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DEFINE(CC_ESR, offsetof(struct cpu_context, esr));
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DEFINE(CC_FSR, offsetof(struct cpu_context, fsr));
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BLANK();
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/* struct cpuinfo */
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DEFINE(CI_DCS, offsetof(struct cpuinfo, dcache_size));
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DEFINE(CI_DCL, offsetof(struct cpuinfo, dcache_line_length));
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DEFINE(CI_ICS, offsetof(struct cpuinfo, icache_size));
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DEFINE(CI_ICL, offsetof(struct cpuinfo, icache_line_length));
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BLANK();
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return 0;
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}
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