Rockchip Kconfig options, fixing a possible null-pointer and a
typo in the dt-bindings.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJWIlknAAoJEPOmecmc0R2BrTkH/3w+1ZZuvtfQmzBkPwJGJ9vJ
zZFZLZqD0NADib8sOhFnJxTfxrhoE/Bfijqk4wPfjdKta2GABfljGbLDanQB8Yr9
Ip+fyflQ6cd925dEuPccHMbumZep+QuSIGYjOGFIuRbbjCdOY5MB+I2Yhvognwus
Xh4FtjS7CL6ruotmyOcMtnpNDCAvc8NSwO7xBqxYRPcgd+DY8+86cD/dUpvmD4Kr
pGtUXkfQpAjBhV9P6RuP63gO42JD1VMb7c6idd+B/tzbJxI08CTDolwqvyujVkHf
KeRvu7g8qKKUwL5ffOImR4tR/T2o1wDLwfxuUJXW+mIVJa72qA+h90aNOhM2iC8=
=Qk94
-----END PGP SIGNATURE-----
Merge tag 'v4.4-rockchip-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers
Some fixes for the new power-domain driver, including restricting
Rockchip Kconfig options, fixing a possible null-pointer and a
typo in the dt-bindings.
* tag 'v4.4-rockchip-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: Correct paths in Rockchip power domains binding document
soc: rockchip: power-domain: don't try to print the clock name in error case
soc: rockchip: Restrict to ARCH_ROCKCHIP
Signed-off-by: Olof Johansson <olof@lixom.net>
The PSCI specifications [1] and the SMC calling convention mandate
that unimplemented functions ids must return NOT_SUPPORTED (0xffffffff)
if a function id is called but it is not implemented.
Consequently, PSCI 1.0 function ids that require the 1.0 PSCI_FEATURES
call to be initialized:
CPU_SUSPEND (psci_init_cpu_suspend())
SYSTEM_SUSPEND (psci_init_system_suspend())
call the PSCI_FEATURES function id independently of the detected
PSCI firmware version, since, if the PSCI_FEATURES function id is not
implemented, it must return NOT_SUPPORTED according to the PSCI
specifications, causing the initialization functions to fail as expected.
Some existing PSCI implementations (ie Qemu PSCI emulation), do not
comply with the SMC calling convention and fail if function ids that are
not implemented are called from the OS, causing boot failures.
To solve this issue, this patch adds code that checks the PSCI firmware
version before calling PSCI 1.0 initialization functions so that the
OS makes sure that it is calling 1.0 functions only if the firmware
version detected is 1.0 or greater, therefore avoiding PSCI calls
that are bound to fail and might cause system boot failures owing
to non-compliant PSCI firmware implementations.
[1] http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Tested-by: Kevin Hilman <khilman@kernel.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
features for arm/arm64 platforms:
- Lorenzo Pieralisi adds support for the PSCI_FEATURES call, manages
various 1.0 specifications updates (power state id and functions return
values) and provides PSCI v1.0 DT bindings
- Sudeep Holla implements PSCI v1.0 system suspend support to enable PSCI
based suspend-to-RAM
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJWEmNwAAoJEIKLOaai0TZ/unUP/1+90ySUHIChaH70WrvIqJ3Z
YfueoM63cOcRNB7EFx5SrcKWh6tFgeUsT2+4WDA8j0CIvRwO6YaESvtXRHmGfwgQ
F3NWlWnJF3xiCU0kg26YQjvNll9OgQXkwCLzbsk1cdpi8hMfVL4Du8DgjREVIDff
PZ4LiGlYSqvesp+kipXzfAHgHJENXJYISkRv2VwcewOnq28B/Iode3T6Ro8dSjeR
2C9hjZsrwtRZ2lpjU2/4nLMd+On+nA9fw7XhlH/FU8HeLcNlngeQghlA30uQsIxB
1wgBEzHohBqUSSMLPSrk1nca/JV5haSeZWGacdLQ/qLUeMV9TgAB8wAXayVXUoHN
kkSoNWf5lh8ica4BkSGEPun4GY4h3Uv0AhnwCCKiVWL1eXglVklT4QRDVlyBPdXY
nWpRN5RlQLf60Zf6vZrUoRsApy1WVFGWW+GbjBKlWWImCzEDaIJ3695C7Qmj3BJ+
4mSqKE0xkQ8M8eYpS/ilKnmlh7+xNU3za9LtebV97v31+D9TNqvdXxEh0qGuasG4
BWGPptGlxqYH3RH5PrvjFGt0EZmyJ4uD/7doYrXFrXkiv/FX1tDzTAgIWswHeeG5
c4gAw/GlGq3d+oL/aydWlWW/UQYdmfLt2U+NZ3VdkVZVuF33VprJolBC8YQuQldS
2zvgsnflfrLeFayRtDf2
=rYJ6
-----END PGP SIGNATURE-----
Merge tag 'firmware/psci-1.0' of git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/linux into next/drivers
This pull request contains patches that enable PSCI 1.0 firmware
features for arm/arm64 platforms:
- Lorenzo Pieralisi adds support for the PSCI_FEATURES call, manages
various 1.0 specifications updates (power state id and functions return
values) and provides PSCI v1.0 DT bindings
- Sudeep Holla implements PSCI v1.0 system suspend support to enable PSCI
based suspend-to-RAM
* tag 'firmware/psci-1.0' of git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/linux:
drivers: firmware: psci: add system suspend support
drivers: firmware: psci: define more generic PSCI_FN_NATIVE macro
drivers: firmware: psci: add PSCI v1.0 DT bindings
drivers: firmware: psci: add extended stateid power_state support
drivers: firmware: psci: add PSCI_FEATURES call
drivers: firmware: psci: move power_state handling to generic code
drivers: firmware: psci: add INVALID_ADDRESS return value
Signed-off-by: Olof Johansson <olof@lixom.net>
When we never got the the clock-reference, i.e. when IS_ERR(clk) is true,
don't try to print the clock name via %pC as this of course produces a
null-pointer-dereference in __clk_get_name().
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
This fixes a build error when smem is enabled without hwspinlock:
drivers/built-in.o: In function `qcom_smem_alloc':
rockchip-efuse.c:(.text+0x7a3e4): undefined reference to `__hwspin_lock_timeout'
rockchip-efuse.c:(.text+0x7a568): undefined reference to `__hwspin_unlock'
drivers/built-in.o: In function `qcom_smem_remove':
rockchip-efuse.c:(.text+0x7a5cc): undefined reference to `hwspin_lock_free'
drivers/built-in.o: In function `qcom_smem_probe':
rockchip-efuse.c:(.text+0x7a960): undefined reference to `hwspin_lock_request_specific'
rockchip-efuse.c:(.text+0x7a988): undefined reference to `of_hwspin_lock_get_id'
drivers/built-in.o: In function `qcom_smem_get':
rockchip-efuse.c:(.text+0x7aa24): undefined reference to `__hwspin_lock_timeout'
rockchip-efuse.c:(.text+0x7aafc): undefined reference to `__hwspin_unlock'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Implement id_table driver matching in SMD
* Avoid NULL pointer exception on remove of SMEM
* Reorder SMEM/SMD configs
* Make qcom_smem_get() return a pointer
* Handle big endian CPUs correctly in SMEM
* Represent SMD channel layout in structures
* Use __iowrite32_copy() in SMD
* Remove use of VLAIs in SMD
* Handle big endian CPUs correctly in SMD/RPM
* Handle big endian CPUs corretly in SMD
* Reject sending SMD packets that are too large
* Fix endianness issue in SCM __qcom_scm_is_call_available
* Add missing prototype for qcom_scm_is_available()
* Correct SMEM items for upper channels
* Use architecture level to build SCM correctly
* Delete unneeded of_node_put in SMD
* Correct active/slep state flagging in SMD/RPM
* Move RPM message ram out of SMEM DT node
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJWHrOuAAoJEFKiBbHx2RXVam0QAIgXhMTuXLNZlJaJ1bFiRqiy
mAmGpCJl7aN9DPCYXjTzOrPHny0707fZ8lvow7KsjA0OU6JUKP2oD7uSJC9eHyRU
Mp6B/D2LKjgURozrFsjmfOLT4M+zMtuxk9GyYiBVFT8jqTsyYnlJKbWZVP2PsbMt
/1HMCuQj7Fe28Qv833P3DMgARRvT0tp32wvpfoVd91GSp2R1BfpDPN6jlaAX5fVz
8AGMHBoeNSVDDA9J1+3+RZMGKB3Isx5gVodKIkopDQiJSY15Dl32nGKG/6muLdCE
VMELu1Lsn0e5rFg6Sh8wrtSa/K3ujw929xknikM7sh3+q7bVSowJk8l8Bi/+YfvA
uL7sjXnhXypXSi45hii+81piScxkRn9o6N7ioj9KIV4Nuciky6YNN8Zr3Ycr2Z2x
heRz2Ln3A73Cmx4vxEq61lKNIx1qArY+171vsXy0PFQ9Qut4f3UuK6fwnPDL+csC
ivPPuhGwKicQ2YsvmPMGxj650H7RYALTwstKBGl58y+nhmXnCBt1Ftz7u/btWwHH
ifk7Q1qPBsxlN1RJzMOSkjJtiaHuiJY132dRROE63P4uWMGUGEWt2iHwwyJL7D0D
qefh+j4+5/EnYExfgh/lTfNt063qV0wklrHrkvD2q/iG4jAECn1mDNBmA6cLelc5
3f/27CR6w/XEUMXY6mQ2
=hprv
-----END PGP SIGNATURE-----
Merge tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm into next/drivers
Pull "Qualcomm ARM Based SoC Updates for 4.4" from Andy Gross:
* Implement id_table driver matching in SMD
* Avoid NULL pointer exception on remove of SMEM
* Reorder SMEM/SMD configs
* Make qcom_smem_get() return a pointer
* Handle big endian CPUs correctly in SMEM
* Represent SMD channel layout in structures
* Use __iowrite32_copy() in SMD
* Remove use of VLAIs in SMD
* Handle big endian CPUs correctly in SMD/RPM
* Handle big endian CPUs corretly in SMD
* Reject sending SMD packets that are too large
* Fix endianness issue in SCM __qcom_scm_is_call_available
* Add missing prototype for qcom_scm_is_available()
* Correct SMEM items for upper channels
* Use architecture level to build SCM correctly
* Delete unneeded of_node_put in SMD
* Correct active/slep state flagging in SMD/RPM
* Move RPM message ram out of SMEM DT node
* tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
soc: qcom: smem: Move RPM message ram out of smem DT node
soc: qcom: smd-rpm: Correct the active vs sleep state flagging
soc: qcom: smd: delete unneeded of_node_put
firmware: qcom-scm: build for correct architecture level
soc: qcom: smd: Correct SMEM items for upper channels
qcom-scm: add missing prototype for qcom_scm_is_available()
qcom-scm: fix endianess issue in __qcom_scm_is_call_available
soc: qcom: smd: Reject send of too big packets
soc: qcom: smd: Handle big endian CPUs
soc: qcom: smd_rpm: Handle big endian CPUs
soc: qcom: smd: Remove use of VLAIS
soc: qcom: smd: Use __iowrite32_copy() instead of open-coding it
soc: qcom: smd: Represent channel layout in structures
soc: qcom: smem: Handle big endian CPUs
soc: qcom: Make qcom_smem_get() return a pointer
soc: qcom: Reorder SMEM/SMD configs
soc: qcom: smem: Avoid NULL pointer exception on remove
soc: qcom: smd: Implement id_table driver matching
the bindings documentation to reflect this from Vladimir Zapolskiy.
"The change adds support of ARM PrimeCell PL175 MPMC and PL176 MPMC,
the static memory controllers on devices are similar to one found on
ARM PrimeCell PL172, add support to the existing driver."
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQEcBAABCAAGBQJWFtaVAAoJEF5zSH4+/j/ajj4H/1Yi5EZXpfSnSrLzETEkJbXF
VH0RLMA2ODgAgZEJt1y2mS0OW2ImDz2UIUDK86BbPP6cvyTxJft56nAMm8JHRrNU
M6PkOVIgkcSflqIW3LwJlW/TsXYvuaZQ+JJREZeeZT82IxQYAWyfnrKEyypfRTp2
1HTwTJv3E0RR0oefRF4kXnfHuRUlRcFbRjm4NyjH/mIj4HGIK+Vwjirkjq9U6xYn
7dGYj89soxVtlaSH/TTG9F4LnmGk/vOsvXlLBxgvYUWfOHvQDxgxPErVrj7GE2vv
tZ0iLs2tv4dbVo6D/YdQfLP576fKoVbjN3iKvlhP22w67b/QxVPXSgFxier5HK0=
=/iBk
-----END PGP SIGNATURE-----
Merge tag 'drivers_pl172_for_4.4' of https://github.com/manabian/linux-lpc into next/drivers
Merge "PL172 driver updates for v4.4" from Joachim Eastwood:
Support for additional ARM MPMCs to the PL172 driver and an update to
the bindings documentation to reflect this from Vladimir Zapolskiy.
"The change adds support of ARM PrimeCell PL175 MPMC and PL176 MPMC,
the static memory controllers on devices are similar to one found on
ARM PrimeCell PL172, add support to the existing driver."
* tag 'drivers_pl172_for_4.4' of https://github.com/manabian/linux-lpc:
doc: dt: arm,pl172: add description of PL175 and PL176 controllers
memory: pl172: add ARM PrimeCell PL176 MPMC support
memory: pl172: add ARM PrimeCell PL175 MPMC support
memory: pl172: correct MPMC peripheral ID register bits
Add cpuclk in the Berlin BG2Q clock driver. This clk has a divider
fixed to 1.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Marvell Berlin BG2Q SoC also has a clock for the CPU, add a
corresponding CLKID to the dt-binding include.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
SMEM is a software construct built on top of a DDR reserved region
and sometimes a device memory region called RPM message ram. Having
the RPM message ram in the smem DT node's reg property leads to the
smem node being located in different places depending on if the
message ram is being used or not. Let's add a qcom specific
property, qcom,rpm-msg-ram, and point to the device memory from
the SMEM node via a phandle. As SMEM is a software construct, it
really needs to reside at the root of the DT regardless of whether
it's using the message ram or not.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The BIT() was incorrectly inherited from family A and should not be used
on family B where the state is denoted by an enum.
Reported-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Tested-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Device node iterators perform an of_node_put on each iteration, so putting
an of_node_put before a continue results in a double put.
A simplified version of the semantic match that finds this problem is as
follows (http://coccinelle.lip6.fr):
// <smpl>
@@
expression root,e;
local idexpression child;
iterator i;
@@
i(..., child, ...) {
... when != of_node_get(child)
* of_node_put(child);
...
* continue;
}
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The ".arch_extension sec" directive is only available on ARMv6 or higher,
so if we enable the SCM driver while building a kernel for an older CPU,
we get a build error:
/tmp/ccUyhMOY.s:130: Error: selected processor does not support ARM mode `smc #0'
/tmp/ccUyhMOY.s:216: Error: selected processor does not support ARM mode `smc #0'
/tmp/ccUyhMOY.s:373: Error: selected processor does not support ARM mode `smc #0'
make[4]: *** [drivers/firmware/qcom_scm-32.o] Error 1
This changes the Makefile so we pass the ARMv7 architecture level both
for the check and for the actual compilation of the scm driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Update the SMEM items for the second set of SMD channels, as these where
incorrect.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Attempting to find room for a packet that's bigger than the fifo will
never succeed and the calling process will be sleeping forever in the
loop, waiting for enough room. So fail early instead.
Reported-by: Courtney Cavin <courtney.cavin@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Reviewed-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The smd structures are always in little endian, but the smd
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The smd rpm structures are always in little endian, but this
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Usage of VLAIS prevents clang from compiling this file, and it
also opens us to the possibility of allocating a large structure
on the stack to the point that we blow past the limit of the
kernel stack. Remove the VLAIS and allocate a structure on the
heap with kmalloc so that we're safer and more clang friendly.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
We already have a function to do this and it silences some sparse
warnings along the way.
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The rx and tx channel info are laid out in memory next to each
other, and there are two types of channel info structures, byte
based and word based. We have 4 pointers to these info
structures, when we really only need two to point to the
different types of structures. Encapsulate the byte based and
word based tx/rx structures in a "channel pair" structure that
describes the layout of memory and reduces the number of pointers
in the smd channel structure by two.
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The contents of smem are always in little endian, but the smem
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Passing a void ** almost always requires a cast at the call site.
Instead of littering the code with casts every time this function
is called, have qcom_smem_get() return a void pointer to the
location of the smem item. This frees the caller from having to
cast the pointer.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
When I make nconfig, having the SMEM option after the SMD option
causes the configurator to get confused when I'm enabling and
disabling these options. Let's move SMEM before SMD so there's a
clear indented dependency chain.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Don't set a pointer to NULL and then dereference it in the next
line.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Implement a id_table based driver maching mechanism for drivers that
binds to fixed channels and doesn't need any additional configuration,
e.g. IPCRTR and DIAG.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
It adds support for the following features provided by SCP firmware
using different subsystems in Linux:
1. SCPI mailbox protocol driver which using mailbox framework
2. Clocks provided by SCP using clock framework
3. CPU DVFS(cpufreq) using existing arm-big-little driver
4. SCPI based sensors including temperature sensors
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJWF7ifAAoJEABBurwxfuKYAfMP/34ka/n4+U/aPQXzStNIwr3v
Nme9WSf3mUPv26MstRDrWRYi1G2WLOTlc196MpdIt6m6QLOjxzEl3tSq5ILrj7yN
KoLojtISmu/pbhVcJN5fllxgpcJzufLoEWBa5T/Y/4GoIhh1NCYa82QpNgzPmsMd
rPCkYHqwT6I3sIS+/mbDkGA/QnwJ2qtJ8sp3+fL+dyJbI7Aa1zJZP6ectPsxK22+
HFoFTY45rdFv/ojZZFZL8E/gcblYwRWKzIgwdASHuDXxIhd/IPwjrex2Iyv75AQK
zusRQ5Xv82GaYWHVa9GXmZqXkTsvBg4AJwc4Uq2JdB0qOi2a4tc8PkK7Ts5YdHgS
YVGxbY1POtMBi2bJUjsviMY7dGR3I+iEXJTYnbPnkVa+GTv8/FViVmOOLQnnBF4R
fN5FN0vfuL6zaQzOPYLGx3SuEHix3ko2DCAcMg6idIxuBHArlJuS7XKECWdHuc0+
+qn6Iqf8YSKIZ1zrWMggqY/sXuxjtABUBXe3jP3iTKQh8h+9SLfN3wgQM4GFJJcB
gNfvk3Hl5aPFy/7gsgSDlaYbhGKPwTup+R8Fqd6nSBQO+rpRXvQQftwigYQiIEcE
IiOS3BntVQWjoVr9WIifguf6rHG1ZoSMTHdtVVEaqsspT/OGJyq/ynEFJYSFqcqX
NRPdQJNuoXGolGhyoWxD
=9u+p
-----END PGP SIGNATURE-----
Merge tag 'arm-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/drivers
Merge "ARM System Control and Power Interface(SCPI) support" from Sudeep Holla
It adds support for the following features provided by SCP firmware
using different subsystems in Linux:
1. SCPI mailbox protocol driver which using mailbox framework
2. Clocks provided by SCP using clock framework
3. CPU DVFS(cpufreq) using existing arm-big-little driver
4. SCPI based sensors including temperature sensors
* tag 'arm-scpi-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
hwmon: Support thermal zones registration for SCP temperature sensors
hwmon: Support sensors exported via ARM SCP interface
firmware: arm_scpi: Extend to support sensors
Documentation: add DT bindings for ARM SCPI sensors
cpufreq: arm_big_little: add SCPI interface driver
clk: scpi: add support for cpufreq virtual device
clk: add support for clocks provided by SCP(System Control Processor)
firmware: add support for ARM System Control and Power Interface(SCPI) protocol
Documentation: add DT binding for ARM System Control and Power Interface(SCPI) protocol
By definition this directory contains drivers that are specific to the
Rockchip architecture. All Kconfig options should therefore depend on
ARCH_ROCKCHIP to avoid exposing these symbols on other architectures.
For example, this options currently shows up as new when doing an
incremental build on PowerPC.
Signed-off-by: Thierry Reding <treding@nvidia.com>
[add COMPILE_TEST alternative condition]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
support for the rk3288 powerdomain layout but can be easily
extended for the socs (including arm64) later on.
A big thanks to Ceasar Wang for pulling through on this
during 18 revisions.
Also included is a fix to the pm-clock handling in the generic
powerdomains to adapt it to the per-user clock handling we now
do, Acked by Rafael Wysocki.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJWFNeQAAoJEPOmecmc0R2BgHQH/RR/YS0IUPaeYhLr3FMVc47o
GrObw1uaNaykGSV8XYIxoxQaP+MwoW7Mw6ipfw+FLmqVGRjz8ljTIcnFrgz7hly1
CHmG6yCMjAeLh2ZMu3ge/VSQ7BdB7U690Coj5JnnfpO+Rufvu8Pp9sV+q4AH0qH2
bEfsoBoHQldTXCA5vlvH9C0CAqLDOBXWimgLRVi5TGCJjEsQINoeqJOWTl+hHnsi
arJs1sKBi71jFygsYXSZKIUnoZ1JUZofattPH8YgLeXNGUncEUYJsTTWYxm78ORt
3/iP0/mnqXnoFEqrY9Whi3IVpW60gnKUdUuAD4KK9vx1feT0bwLtVf/0lpCNXf8=
=txXq
-----END PGP SIGNATURE-----
Merge tag 'v4.4-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers
Merge "Rockchip power-domain drivers for 4.4" from Heiko Stuebner:
Add the power-domain base-driver which currently contains
support for the rk3288 powerdomain layout but can be easily
extended for the socs (including arm64) later on.
A big thanks to Ceasar Wang for pulling through on this
during 18 revisions.
Also included is a fix to the pm-clock handling in the generic
powerdomains to adapt it to the per-user clock handling we now
do, Acked by Rafael Wysocki.
* tag 'v4.4-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: power-domain: Add power domain driver
dt-bindings: add document of Rockchip power domains
PM / clk: Do not __clk_get passed in clock-references
dt-bindings: add power-domain header for RK3288 SoCs
Add support to create thermal zones based on the temperature sensors
provided by the SCP. The thermal zones can be defined using the
thermal DT bindings and should refer to the SCP sensor id to select
the sensor.
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Cc: Eduardo Valentin <edubezval@gmail.com>
Create a driver to add support for SoC sensors exported by the System
Control Processor (SCP) via the System Control and Power Interface
(SCPI). The supported sensor types is one of voltage, temperature,
current, and power.
The sensor labels and values provided by the SCP are exported via the
hwmon sysfs interface.
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Cc: Sudeep Holla <sudeep.holla@arm.com>
ARM System Control Processor (SCP) provides an API to query and use
the sensors available in the system. Extend the SCPI driver to support
sensor messages.
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
The System Control Processor (SCP) provides access to SoC sensors via
the System Control and Power Interface (SCPI) Message Protocol. Add
bindings to allow probing of these sensors. Also support referencing
of the sensors for setting up thermal zones via the thermal DT
bindings.
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
- properly get the slow clock from timer-atmel-st, tcb_clksrc and pwm-atmel-tcb
- small fix in an error path for tcb_clksrc
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJWE+cSAAoJEKbNnwlvZCyzxtYP/2UiUB2aHcHiFwINhiyOr6p/
HmhJvxR0A72yq8jUkC5UEozj/U4boA66v+u/fR5DB8xV8Fj9VCoflrCqmC0VNoqT
Vh8RklpO0OauiosLDC+pKlZxNHcyc/hDNCv+IeV4VIJKk6dOj+vpaHRqgYljk4/m
zsUXZPKku1DZ45sQwx5a2FqEpsXlMcyawjXPZFuPHymlB2PPKiQDtvouIHOUyDoO
dvlX7C7MVR5XaIiG8pSHMMmNNYhlrGnTYgUEEo0DhqKXpQLLo4XbCxdsq2hGIDhT
XoXgqQVKTLVha3/tHnJjy43OqO65ptTKKMvyFyXaNhknLAz8aomJAgZXeOJSWYUB
a6Z2NRKf28do7+57C95hkbWMNiTziNud903DIuK3S/6c5EmpjJ1IJupGUp4JNmkW
FfT+r4s1J3sO9QNG9Y86/P2jTq3f0aIJesMpQ5mU4xkzVfFZCKeXUOylNLR37VE+
8ofgVyC8kbqClGEuePR0KvuinIj7xGlGOmSNR+M5FR4sZVEvc6xHVwnDXcT9Hbpe
pvVGbXPNfhEEP0E2gqf1GFcqAx8bYQzeFOh0CSA8sEYqP+c8GgfFIgjeP31W4Gti
gjgYeAAUg8i45WZBCPYAJbpsDwzxv8vvpDvioqVJDdQo+aJv0TA6ITl9eHHj0mgV
8WpYxQWiZ2PcBNGtqteK
=UbC0
-----END PGP SIGNATURE-----
Merge tag 'at91-cleanup-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/drivers
Merge "First batch of cleanups for 4.4:" from Alexandre Belloni:
- properly get the slow clock from timer-atmel-st, tcb_clksrc and pwm-atmel-tcb
- small fix in an error path for tcb_clksrc
* tag 'at91-cleanup-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
misc: atmel_tclib: get and use slow clock
clocksource: tcb_clksrc: fix setup_clkevents error path
clocksource: atmel-st: get and use slow clock
* Consider "zb_clk" suitable for power management
This part of a multi-stage effort by Geert Uytterhoeven to add:
"Clock Domain support to the Clock Pulse Generator (CPG) Module Stop
(MSTP) Clocks driver using the generic PM Domain, to be used on shmobile
SoCs without device power domains (R-Car Gen1 and Gen2, RZ). This allows
to power-manage the module clocks of SoC devices that are part of the
CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume,
similar to SoCs with device power domains (SH-Mobile and R-Mobile)."
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWA4gxAAoJENfPZGlqN0++9/EP/1vkaLHEyJsLvRLoncSmyajk
ZTHNpvodaH1XLwE3nU4JD7XS79ffNU+Gp5Hm8vQ5OueaFgM44p8qdzNRHfCCQD1g
k3u1sgpdzEK6cOAZSYGa2Psey59duFar09z7GXPTSiiPWcZY3e/29gVpM5HA5TJ+
yFKG1pedP9T01mZNhMXo9E0GyiVWDne/6meXDz6m3X9yXsTNxB28TuWM8y6pllpX
A+AezjvovQHUgXM02z+IX/R4n6nebfzgK2jIb0WrLsJP5GUdFvKlw2KGdOAWhxkI
IGZpi9LoAISpZZx6Zl5L4IzTaz2ACJlGe4i2jLjMUlMwwn3Cg9TFlilcsWpLT3ZV
Y3SU1R0ErWRgGcop+Vne0oNIGigQrzu9pN9+OiZAkQU9YcYjthU+agPBCpmgjXo6
qSx/XKyjU4fAhS2EVym9ca/8L4mCcQTSahLmuinuIZXZzRYgunzOtKmeBJ7hfB+V
h1j5nIKecHuMhXRLBVwAGaKKxIfBQoSqaj3cAxT9QXPdwoFS1eeffflR+qmjmVt2
WbUOqDATvUt/YniuUgQ2BYVadfZem6swsjXC1YDOAj/X9Imsg+idnruzRh+9CKm5
ICt0zlXhejvqqyRAEjbXq46E3Eu5nDOCb5bpHmc5hvA4/A3QeyTWDl/t2ChZlRbV
fdg+sK2Pz0XTCJz2VUN9
=lwZa
-----END PGP SIGNATURE-----
Merge tag 'renesas-clk-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Merge "Renesas ARM Based SoC Clk Updates for v4.4" from Simon Horman:
* Consider "zb_clk" suitable for power management
This part of a multi-stage effort by Geert Uytterhoeven to add:
"Clock Domain support to the Clock Pulse Generator (CPG) Module Stop
(MSTP) Clocks driver using the generic PM Domain, to be used on shmobile
SoCs without device power domains (R-Car Gen1 and Gen2, RZ). This allows
to power-manage the module clocks of SoC devices that are part of the
CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume,
similar to SoCs with device power domains (SH-Mobile and R-Mobile)."
* tag 'renesas-clk-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
clk: shmobile: mstp: Consider "zb_clk" suitable for power management
Commit dca1a4b5ff ("clk: at91: keep slow clk enabled to prevent system
hang") added a workaround for the slow clock as it is not properly handled
by its users.
Get and use the slow clock as it is necessary for the timer counters.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
t2_clk is already disabled before request_irq(), it must not be disabled
again.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
The current slow clock rate is hardcoded. Properly get the slow clock
and use its rate.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
This driver is found on RK3288 SoCs.
In order to meet high performance and low power requirements, a power
management unit is designed or saving power when RK3288 in low power
mode.
The RK3288 PMU is dedicated for managing the power of the whole chip.
PMU can work in the Low Power Mode by setting bit[0] of PMU_PWRMODE_CON
register. After setting the register, PMU would enter the Low Power mode.
In the low power mode, pmu will auto power on/off the specified power
domain, send idle req to specified power domain, shut down/up pll and
so on. All of above are configurable by setting corresponding registers.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
[replace dsb() with dsb(sy) for arm64 buildability; sy is the default,
so no functional change; adapt to per-user clocks in genpd]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This add the necessary binding documentation for the power domains
found on Rockchip SoCs.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Clock references are on a per-user basis now, so they are not supposed
to be refcounted by itself anymore. Therefore multiple cascaded get and
put calls will fail.
When a clock reference gets passed into pm_clk_add_clk we can assume
that the pm clock handling will take control of the clock reference,
so after this functions returns the caller should've given up control
of that handle.
So remove the additional call to __clk_get() in __pm_clk_add().
The only current user of pm_clk_add_clk is drivers/clk/shmobile/clk-mstp.c
which already follows this paradigm by only getting the clock but not
puting it after passing the reference into pm_clk_add_clk.
In the error case the caller is expected to clean up the clock, as it
may very well try to do something different if pm_clk_add_clk() fails.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[add commit-message]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Pull strscpy string copy function implementation from Chris Metcalf.
Chris sent this during the merge window, but I waffled back and forth on
the pull request, which is why it's going in only now.
The new "strscpy()" function is definitely easier to use and more secure
than either strncpy() or strlcpy(), both of which are horrible nasty
interfaces that have serious and irredeemable problems.
strncpy() has a useless return value, and doesn't NUL-terminate an
overlong result. To make matters worse, it pads a short result with
zeroes, which is a performance disaster if you have big buffers.
strlcpy(), by contrast, is a mis-designed "fix" for strlcpy(), lacking
the insane NUL padding, but having a differently broken return value
which returns the original length of the source string. Which means
that it will read characters past the count from the source buffer, and
you have to trust the source to be properly terminated. It also makes
error handling fragile, since the test for overflow is unnecessarily
subtle.
strscpy() avoids both these problems, guaranteeing the NUL termination
(but not excessive padding) if the destination size wasn't zero, and
making the overflow condition very obvious by returning -E2BIG. It also
doesn't read past the size of the source, and can thus be used for
untrusted source data too.
So why did I waffle about this for so long?
Every time we introduce a new-and-improved interface, people start doing
these interminable series of trivial conversion patches.
And every time that happens, somebody does some silly mistake, and the
conversion patch to the improved interface actually makes things worse.
Because the patch is mindnumbing and trivial, nobody has the attention
span to look at it carefully, and it's usually done over large swatches
of source code which means that not every conversion gets tested.
So I'm pulling the strscpy() support because it *is* a better interface.
But I will refuse to pull mindless conversion patches. Use this in
places where it makes sense, but don't do trivial patches to fix things
that aren't actually known to be broken.
* 'strscpy' of git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
tile: use global strscpy() rather than private copy
string: provide strscpy()
Make asm/word-at-a-time.h available on all architectures