____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Update the comment to include 'may'.
Fixes: 0357e488b8 ("iio:dac:ad5686: Refactor the driver")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-50-jic23@kernel.org
Up to now ad5686_remove() returns zero unconditionally. Make it return
void instead which makes it easier to see in the callers that there is
no error to handle.
Also the return value of i2c and spi remove callbacks is ignored anyway.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Alexandru Ardelean <ardeleanalex@gmail.com>
Link: https://lore.kernel.org/r/20211013203223.2694577-11-u.kleine-koenig@pengutronix.de
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The AD5673R/AD5677R are low power, 16-channel, 12-/16-bit buffered voltage
output digital-to-analog converters (DACs). They include a 2.5 V internal
reference (enabled by default).
These devices are very similar to AD5674R/AD5679R, except that they
have an i2c interface.
Signed-off-by: Mircea Caprioru <mircea.caprioru@analog.com>
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Link: https://lore.kernel.org/r/20210217074102.23148-1-alexandru.ardelean@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The AD5338R is a 10-bit DAC with 2 outputs and an internal 2.5V
reference (enabled by default). The register configuration is nearly
identical to the AD5696R DAC that's already supported by this driver,
with the channel selection bits being the only thing different.
Signed-off-by: Michael Auchter <michael.auchter@ni.com>
Link: https://lore.kernel.org/r/20200924195215.49443-1-michael.auchter@ni.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
These are never modified and can be made const to allow the compiler to
put it in read-only memory.
Before:
text data bss dec hex filename
6642 12608 64 19314 4b72 drivers/iio/dac/ad5686.o
After:
text data bss dec hex filename
16946 2304 64 19314 4b72 drivers/iio/dac/ad5686.o
Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Acked-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
As part of the general cleanup of indio_dev->mlock, this change replaces
it with a local lock on the device's state structure.
Signed-off-by: Sergiu Cuciurean <sergiu.cuciurean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Analog Devices drivers are typically GPL v2 only. This patch fixes the
inconsistencies between the module license and SPDX.
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The AD5674R/AD5679R are low power, 16-channel, 12-/16-bit buffered voltage
output digital-to-analog converters (DACs). They include a 2.5 V internal
reference (enabled by default).
These devices are very similar to AD5684R/AD5686R, except that they have 16
channels.
Signed-off-by: Mircea Caprioru <mircea.caprioru@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The AD5310R is a single channel DAC with 10-bit precision, which is
part of the same family as AD5311R, except that it uses the spi interface
instead of i2c. The device has a built-in 2.5V reference which is enabled
by default.
Another important difference is that the SPI write command operation is
16 bits long. The first four bits represent the command, while the
remaining 12 bits are for data. In the control reg, DB9 and DB10 are used
for power-down modes, while DB8 is the REF bit. In order to accommodate
this change, a new regmap type was defined and checked accordingly.
Because AD5310R does not have a readback register, the read_raw operation
will return "Operation is not supported".
Datasheet:
Link: http://www.analog.com/media/en/technical-documentation/data-sheets/AD5310R_5311R.pdf
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Mircea Caprioru <mircea.caprioru@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
AD5311R is a single channel DAC with 10-bit precision and i2c interface.
The device includes a 2.5V internal reference which is enabled by default.
This device is similar to AD5691R/AD5692R/AD5693/AD5693R, the only
difference is that it has 10-bit precision.
Datasheet:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD5310R_5311R.pdf
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The AD5681R/AD5682R/AD5683/AD5683R are a family of one channel DACs with
12-bit, 14-bit and 16-bit precision respectively. The devices have either
no built-in reference, or built-in 2.5V reference.
These devices are similar to AD5691R/AD5692R/AD5693/AD5693R except
with a few notable differences:
* they use the SPI interface instead of I2C
* in the write control register, DB18 and DB17 are used for setting the
power mode, while DB16 is the REF bit. This is why a new regmap type
was defined and checked accordingly.
* the shift register is 24 bits wide, the first four bits are the command
bits followed by the data bits. As the data comprises of 20-bit, 18-bit
or 16-bit input code, this means that 4 LSB bits are don't care. This is
why the data needs to be shifted on the left with four bits. Therefore,
AD5683_REGMAP is checked inside a switch case in the ad5686_spi_write()
function. On the other hand, similar devices such as AD5693R family,
have the 4 MSB command bits followed by 4 don't care bits.
Datasheet:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD5683R_5682R_5681R_5683.pdf
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The AD5691R/AD5692R/AD5693/AD5693R are a family of one channel DACs with
12-bit, 14-bit and 16-bit precision respectively. The devices have either
no built-in reference, or built-in 2.5V reference.
These devices are pretty similar to AD5671R/AD5675R and
AD5694/AD5694R/AD5695R/AD5696/AD5696R, except that they have one channel.
Another difference is that they use a write control register(addr 0x04) for
setting the power down modes and the internal reference instead of separate
registers for each function.
Datasheet:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD5693R_5692R_5691R_5693.pdf
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
The AD5694/AD5694R/AD5695R/AD5696/AD5696R are a family of 4 channel DACs
with 12-bit, 14-bit and 16-bit precision respectively. The devices have
either no built-in reference, or built-in 2.5V reference.
The AD5671R/AD5675R are similar, except that they have 8 instead of 4
channels.
These devices are similar to AD5672R/AD5676/AD5676R and
AD5684/AD5684R/AD5684/AD5685R/AD5686/AD5686R, except that they use i2c
instead of spi.
Datasheets:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD5671R_5675R.pdfhttp://www.analog.com/media/en/technical-documentation/data-sheets/AD5696R_5695R_5694R.pdf
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
In this patch restructures the existing ad5686 driver by adding a module
for SPI and a header file, while the baseline module deals with the
chip-logic.
This is a necessary step, as this driver should support in the future
similar devices which differ only in the type of interface used (I2C
instead of SPI).
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
