Commit Graph

1 Commits

Author SHA1 Message Date
Chun-Jie Chen
f5bf0c1b48 clk: mediatek: Add MT8195 vppsys0 clock support
Add MT8195 vppsys0 clock controller which provides clock gate
controller for Video Processor Pipe.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210914021633.26377-21-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-09-14 15:05:39 -07:00